DS_DMA
|
Architectures | |
ctrl_fifo64x70st_a | Architecture |
Libraries | |
ieee | |
XilinxCoreLib | |
Packages | |
std_logic_1164 | |
Ports | |
clk | in std_logic |
rst | in std_logic |
din | in std_logic_vector ( 69 downto 0 ) |
wr_en | in std_logic |
rd_en | in std_logic |
dout | out std_logic_vector ( 69 downto 0 ) |
full | out std_logic |
empty | out std_logic |
valid | out std_logic |
prog_full | out std_logic |
prog_empty | out std_logic |
См. определение в файле ctrl_fifo64x70st.vhd строка 43