DS_DMA
pcie_src/pcie_core64_m1/pcie_ctrl/core64_pb_disp.vhd
00001 -------------------------------------------------------------------------------
00002 --
00003 -- Title       : core64_pb_disp
00004 -- Author      : Dmitry Smekhov
00005 -- Company     : Instrumental Systems
00006 -- E-mail      : dsmv@insys.ru
00007 --
00008 -- Version     : 1.0
00009 --
00010 -------------------------------------------------------------------------------
00011 --
00012 -- Description :  Диспетчер шины PB_BUS 
00013 --
00014 -------------------------------------------------------------------------------
00015 
00016 
00017 library ieee;
00018 use ieee.std_logic_1164.all;
00019 
00020 use work.core64_type_pkg.all;
00021 
00022 package core64_pb_disp_pkg is
00023 
00024 component core64_pb_disp is
00025         port(
00026                 --- General ---
00027                 rstp                            : in std_logic;         --! 1 - сброс 
00028                 clk                                     : in std_logic;         --! тактовая частота ядра - 250 MHz 
00029                 
00030                 ---- PB_DISP ----
00031                 reg_disp                        : in  type_reg_disp;            --! запрос на доступ к регистрам из BAR1 
00032                 reg_disp_back           : out type_reg_disp_back;       --! ответ на запрос 
00033                 
00034                 ---- EXT_FIFO ----
00035                 ext_fifo_disp           : in  type_ext_fifo_disp;               --! запрос на доступ от узла EXT_FIFO 
00036                 ext_fifo_disp_back      : out type_ext_fifo_disp_back;  --! ответ на запрос
00037                 
00038                 ---- BAR1 ----  
00039                 aclk                            : in std_logic;                         --! тактовая частота локальной шины - 266 МГц
00040                 pb_master                       : out type_pb_master;           --! запрос 
00041                 pb_slave                        : in  type_pb_slave                     --! ответ  
00042 
00043         );
00044 
00045 end component;
00046 
00047 end package;
00048 
00049 
00050 library ieee;
00051 use ieee.std_logic_1164.all;
00052 
00053 use work.core64_type_pkg.all;
00054 
00055 entity core64_pb_disp is
00056         port(
00057                 --- General ---
00058                 rstp                            : in std_logic;         --! 1 - сброс 
00059                 clk                                     : in std_logic;         --! тактовая частота ядра - 250 MHz 
00060                 
00061                 ---- PB_DISP ----
00062                 reg_disp                        : in  type_reg_disp;            --! запрос на доступ к регистрам из BAR1 
00063                 reg_disp_back           : out type_reg_disp_back;       --! ответ на запрос 
00064                 
00065                 ---- EXT_FIFO ----
00066                 ext_fifo_disp           : in  type_ext_fifo_disp;               --! запрос на доступ от узла EXT_FIFO 
00067                 ext_fifo_disp_back      : out type_ext_fifo_disp_back;  --! ответ на запрос
00068                 
00069                 ---- BAR1 ----  
00070                 aclk                            : in std_logic;                         --! тактовая частота локальной шины - 266 МГц
00071                 pb_master                       : out type_pb_master;           --! запрос 
00072                 pb_slave                        : in  type_pb_slave                     --! ответ  
00073 
00074         );
00075 
00076 end core64_pb_disp;
00077 
00078 
00079 architecture core64_pb_disp of core64_pb_disp is
00080 
00081 signal  reg_req_wr                      : std_logic;
00082 signal  reg_req_wr_z            : std_logic;
00083 signal  reg_req_rd                      : std_logic;
00084 signal  reg_req_rd_z            : std_logic;
00085 
00086 signal  pb_sel                          : std_logic;   
00087 
00088 signal  master_data                     : std_logic_vector( 63 downto 0 );
00089 signal  master_stb0                     : std_logic;
00090 signal  master_stb1                     : std_logic;    
00091 signal  master_cmd                      : std_logic_vector( 2 downto 0 );
00092 
00093 signal  reg_stb1                        : std_logic;
00094 
00095 signal  rstpz                           : std_logic;
00096 
00097 type stp_type is ( s0, sr1, sr2, sr3, sr4, sr5, sf1, sf2, sf3 );
00098 
00099 signal  stp                                     : stp_type;
00100 
00101 signal  pb_slave_stb1_z         : std_logic;
00102 signal  ex_fifo_stb1_z          : std_logic;
00103 signal  ext_fifo_eot            : std_logic;
00104 
00105 signal  master_adr                      : std_logic_vector( 31 downto 0 );
00106 signal  dmar                            : std_logic_vector( 1 downto 0 );
00107 
00108 signal  fifo_allow_wr           : std_logic;              
00109 signal  fifo_data_en            : std_logic;
00110 
00111 
00112 attribute tig                           : string;
00113 attribute tig   of      master_adr                              : signal is "";
00114 attribute tig   of      dmar                                    : signal is "";
00115 attribute tig   of      rstp                                    : signal is "";
00116 
00117 begin                                                                   
00118         
00119 rstpz <= rstp after 1 ns when rising_edge( aclk );      
00120 
00121 reg_req_wr <= reg_disp.request_reg_wr after 1 ns when rising_edge( aclk );
00122 reg_req_wr_z <= reg_req_wr after 1 ns when rising_edge( aclk );
00123 
00124 reg_req_rd <= reg_disp.request_reg_rd after 1 ns when rising_edge( aclk );
00125 reg_req_rd_z <= reg_req_rd after 1 ns when rising_edge( aclk );
00126 
00127 
00128 master_adr <= reg_disp.adr when pb_sel='0' else ext_fifo_disp.adr;
00129 pb_master.adr <= master_adr;
00130         
00131 master_data( 31 downto 0 ) <= reg_disp.data when pb_sel='0' else ext_fifo_disp.data( 31 downto 0 );
00132 master_data( 63 downto 32 ) <= ext_fifo_disp.data( 63 downto 32 );      
00133 
00134 master_stb1 <= reg_stb1 or ext_fifo_disp.data_we;
00135 
00136 pb_master.data <= master_data after 1 ns when rising_edge( aclk );
00137 pb_master.cmd <= master_cmd;
00138 
00139 pb_master.stb0 <= master_stb0  after 1 ns when rising_edge( aclk );
00140 pb_master.stb1 <= master_stb1  after 1 ns when rising_edge( aclk );
00141 
00142 reg_disp_back.data <= pb_slave.data( 31 downto 0 ) after 1 ns  when rising_edge( aclk ) and pb_slave.stb1='1';
00143 
00144 ext_fifo_disp_back.data    <= pb_slave.data after 1 ns  when rising_edge( aclk );
00145 ext_fifo_disp_back.data_we <= pb_slave.stb1 and fifo_data_en after 1 ns  when rising_edge( aclk );
00146 dmar <= pb_slave.dmar;           
00147 ext_fifo_disp_back.dmar <= dmar;
00148 
00149 ext_fifo_disp_back.irq <= pb_slave.irq;
00150 
00151 pb_sel <= master_cmd(2) after 1 ns;
00152 
00153 pr_state: process( aclk ) begin
00154         if( rising_edge( aclk ) ) then
00155                 case( stp ) is
00156                         when s0 =>
00157                                 master_cmd <= "000" after 1 ns;
00158                                 master_stb0 <= '0' after 1 ns;                   
00159                                 reg_disp_back.complete <= '0' after 1 ns;
00160                                 reg_disp_back.data_we <= '0' after 1 ns;   
00161                                 fifo_allow_wr <= '0' after 1 ns;
00162                                 reg_stb1 <= '0' after 1 ns;                     
00163                                 fifo_data_en <= '0' after 1 ns;
00164                                 
00165                                 if( reg_req_wr_z='1' or reg_req_rd_z='1' ) then
00166                                         stp <= sr1 after 1 ns;
00167                                 elsif( ext_fifo_disp.request_wr='1' or ext_fifo_disp.request_rd='1' ) then
00168                                         stp <= sf1 after 1 ns;
00169                                 end if;
00170                                 
00171                         when sr1 => ---- Обращение к регистрам ----
00172                                 master_cmd(0) <= reg_req_wr_z after 1 ns;       -- 1 - запись
00173                                 master_cmd(1) <= reg_req_rd_z after 1 ns;       -- 1 - чтение 
00174                                 master_cmd(2) <= '0';   -- только одно 32-х разрядное слово 
00175                                 master_stb0 <= '1' after 1 ns;  -- строб команды
00176                                 stp <= sr2 after 1 ns;
00177                                 
00178                         when sr2 =>     ---- Строб записи слова ----
00179                                 master_stb0 <= '0' after 1 ns;
00180                                 reg_stb1 <= reg_req_wr_z after 1 ns;
00181                                 stp <= sr3 after 1 ns;
00182                                 
00183                                 
00184                         when sr3 =>     ---- Ожидание подтверждения команды ---
00185                                 reg_stb1 <= '0' after 1 ns;
00186                                 if( pb_slave.stb0='1' ) then
00187                                         if( reg_req_rd_z='1' ) then
00188                                                  stp <= sr4 after 1 ns;
00189                                         else
00190                                                 stp <= sr5 after 1 ns;
00191                                         end if;
00192                                 end if; 
00193                                 
00194                         when sr4 => ---- Ожидание данных ----
00195                                 if( pb_slave.stb1='1' ) then
00196                                         reg_disp_back.data_we <= '1' after 1 ns;
00197                                         stp <= sr5 after 1 ns;
00198                                 end if;
00199                                 
00200                         when sr5 => ---- Ожидание снятия запроса ----
00201                                 master_cmd <= "000";
00202                                 reg_disp_back.data_we <= '0' after 1 ns;
00203                                 reg_disp_back.complete <= '1' after 1 ns;
00204                                 if( reg_req_wr_z='0' and reg_req_rd_z='0' ) then
00205                                         stp <= s0 after 1 ns;
00206                                 end if;
00207                                 
00208                                 
00209 
00210                         when sf1 =>     
00211                                 master_cmd(0) <= ext_fifo_disp.request_wr after 1 ns;   -- 1 - запись
00212                                 master_cmd(1) <= ext_fifo_disp.request_rd after 1 ns;   -- 1 - чтение 
00213                                 master_cmd(2) <= '1';   -- блок 512 слов 
00214                                 master_stb0 <= '1' after 1 ns;  -- строб команды
00215                                 stp <= sf2 after 1 ns;
00216                                 
00217                         when sf2 =>                                     
00218                                 master_stb0 <= '0' after 1 ns;  -- строб команды
00219                                 fifo_allow_wr <= ext_fifo_disp.request_wr after 1 ns;
00220                                 fifo_data_en <= '1' after 1 ns;
00221                                 if( ext_fifo_eot='1' ) then
00222                                         stp <= sf3 after 1 ns;
00223                                 end if;
00224                                 
00225                         when sf3 =>
00226                                 fifo_allow_wr <= '0' after 1 ns;
00227                                 if( ext_fifo_disp.request_wr='0' and ext_fifo_disp.request_rd='0' ) then
00228                                         stp <= s0 after 1 ns;
00229                                 end if;
00230                                         
00231                         
00232                 end case;
00233                 
00234                 if( rstpz='1' ) then
00235                         stp <= s0 after 1 ns;
00236                 end if;
00237                 
00238         end if;
00239 end process;                       
00240 
00241 ext_fifo_disp_back.allow_wr <= fifo_allow_wr;
00242 
00243 pb_slave_stb1_z  <= pb_slave.stb1 after 1 ns when rising_edge( aclk );
00244 ex_fifo_stb1_z   <= ext_fifo_disp.data_we after 1 ns when rising_edge( aclk );
00245 
00246 ext_fifo_eot <= (pb_slave_stb1_z and not pb_slave.stb1) or
00247                                  (ex_fifo_stb1_z and not ext_fifo_disp.data_we ) after 1 ns when rising_edge( aclk );
00248 
00249 end core64_pb_disp;
00250