AMBPEX5_v20_SX50T_CORE
Signals | Component Instantiations | Processes
stend_ambpex5_core_m2 Architecture Reference
Граф наследования:stend_ambpex5_core_m2:
ambpex5_v20_sx50t_core ambpex5_v20_sx50t_core cl_ambpex5_m5 trd_main_v8 trd_admdio64_in_v6 trd_admdio64_out_v4 trd_test_ctrl_m1 cl_ambpex5_m5 trd_main_v8 trd_admdio64_in_v6 trd_admdio64_out_v4 trd_test_ctrl_m1 ctrl_freq cl_test_check cl_test_generate cl_chn_v3 ctrl_buft16 cl_fifo1024x65_v5 cl_chn_v4 ctrl_buft16 cl_fifo1024x65_v5 cl_chn_v3 ctrl_buft64 ctrl_buft16 ctrl_thdac ctrl_start_v2 cl_test0_v4 pb_adm_ctrl_m2 ctrl_blink stend_ambpex5_core_m2

Полный список членов класса



Processes

pr_main  ( )

Signals

clk250  std_logic := ' 0 '
clk250p  std_logic
clk250n  std_logic
clk100  std_logic := ' 0 '
reset  std_logic
txp  std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
txn  std_logic_vector ( 7 downto 0 ) := ( others = > ' 1 ' )
rxp  std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
rxn  std_logic_vector ( 7 downto 0 ) := ( others = > ' 1 ' )
rp_txp  std_logic_vector ( 0 downto 0 ) := ( others = > ' 0 ' )
rp_txn  std_logic_vector ( 0 downto 0 ) := ( others = > ' 1 ' )
rp_rxp  std_logic_vector ( 0 downto 0 ) := ( others = > ' 0 ' )
rp_rxn  std_logic_vector ( 0 downto 0 ) := ( others = > ' 1 ' )
tp  std_logic_vector ( 3 downto 1 )
led1  std_logic
led2  std_logic
led3  std_logic
led4  std_logic
cmd  bh_cmd
ret  bh_ret

Component Instantiations

amb  ambpex5_v20_sx50t_core <Entity ambpex5_v20_sx50t_core>
rp  xilinx_pcie_rport_m2

Подробное описание

См. определение в файле stend_ambpex5_core_m2.vhd строка 37


Объявления и описания членов класса находятся в файле: