Граф наследования:trd_admdio64_in_v6:
Architectures | |
| trd_admdio64_in_v6 | Architecture |
Libraries | |
| ieee | |
| unisim | |
| work | |
Packages | |
| std_logic_1164 | |
| vcomponents | |
| cl_chn_v3_pkg | Package <cl_chn_v3_pkg> |
| adm2_pkg | Package <adm2_pkg> |
| cl_fifo1024x65_v5_pkg | Package <cl_fifo1024x65_v5_pkg> |
Ports | |
| reset | in std_logic |
| clk | in std_logic |
| data_out | out std_logic_vector ( 63 downto 0 ) |
| data_out2 | out std_logic_vector ( 63 downto 0 ) |
| cmd_data_in | in std_logic_vector ( 15 downto 0 ) |
| cmd | in bl_cmd |
| cmd_data_out | out std_logic_vector ( 15 downto 0 ) |
| cmd_data_out2 | out std_logic_vector ( 15 downto 0 ) |
| bx_irq | out std_logic |
| bx_drq | out bl_drq |
| mode0 | out std_logic_vector ( 15 downto 0 ) |
| mode1 | out std_logic_vector ( 15 downto 0 ) |
| mode2 | out std_logic_vector ( 15 downto 0 ) |
| mode3 | out std_logic_vector ( 15 downto 0 ) |
| fifo_rst_in | in std_logic := ' 1 ' |
| fifo_rst | out std_logic |
| start | out std_logic |
| data_in | in std_logic_vector ( 63 downto 0 ) |
| data_wr | in std_logic |
| flag_wr | out bl_fifo_flag |
| flag_rd | out bl_fifo_flag |
| clk_wr | in std_logic |
| fifo_cnt_wr | out std_logic_vector ( 9 downto 0 ) |
| fifo_cnt_rd | out std_logic_vector ( 9 downto 0 ) |
Подробное описание
См. определение в файле trd_admdio64_in_v6.vhd строка 99
Объявления и описания членов класса находятся в файле:
- adm/dio64/trd_admdio64_in_v6.vhd
