AMBPEX5_v20_SX50T_CORE
|
Architectures | |
cl_test_generate | Architecture |
Libraries | |
ieee | |
unisim | |
work | |
Packages | |
std_logic_1164 | |
std_logic_arith | |
std_logic_unsigned | |
vcomponents | |
adm2_pkg | Package <adm2_pkg> |
Ports | |
reset | in std_logic |
clk | in std_logic |
di_clk | in std_logic |
di_data | out std_logic_vector ( 63 downto 0 ) |
di_data_we | out std_logic |
di_flag_paf | in std_logic |
di_fifo_rst | in std_logic |
di_start | in std_logic |
test_gen_ctrl | in std_logic_vector ( 15 downto 0 ) |
test_gen_size | in std_logic_vector ( 15 downto 0 ) |
test_gen_bl_wr | out std_logic_vector ( 31 downto 0 ) |
test_gen_cnt1 | in std_logic_vector ( 15 downto 0 ) |
test_gen_cnt2 | in std_logic_vector ( 15 downto 0 ) |
См. определение в файле cl_test_generate.vhd строка 122