Граф наследования:block_pe_main:
Architectures | |
| block_pe_main | Architecture |
Libraries | |
| ieee | |
| work | |
| unisim | |
Packages | |
| std_logic_1164 | |
| host_pkg | Package <host_pkg> |
| ctrl_ram16_v1_pkg | Package <ctrl_ram16_v1_pkg> |
| vcomponents | |
Generics | |
| Device_ID | in std_logic_vector ( 15 downto 0 ) := x " 0000 " |
| Revision | in std_logic_vector ( 15 downto 0 ) := x " 0000 " |
| PLD_VER | in std_logic_vector ( 15 downto 0 ) := x " 0000 " |
| BLOCK_CNT | in std_logic_vector ( 15 downto 0 ) := x " 0000 " |
Ports | |
| reset_hr1 | in std_logic |
| clk | in std_logic |
| pb_reset | out std_logic |
| bl_adr | in std_logic_vector ( 4 downto 0 ) |
| bl_data_in | in std_logic_vector ( 31 downto 0 ) |
| bl_data_out | out std_logic_vector ( 31 downto 0 ) |
| bl_data_we | in std_logic |
| brd_mode | out std_logic_vector ( 15 downto 0 ) |
Подробное описание
См. определение в файле block_pe_main.vhd строка 78
Объявления и описания членов класса находятся в файле:
- pcie_src/components/block_main/block_pe_main.vhd
