Граф наследования:block_pe_main:
Processes | |
| pr_data_out | ( clk ) |
| pr_reg | ( reset_hr1 , clk ) |
Constants | |
| BLOCK_ID | std_logic_vector ( 15 downto 0 ) := x " 1013 " |
| BLOCK_VER | std_logic_vector ( 15 downto 0 ) := x " 0101 " |
| bl_rom | bh_rom := ( 0 = > BLOCK_ID , 1 = > BLOCK_VER , 2 = > x " 5504 " , 3 = > x " 0210 " , 4 = > x " 0104 " , 5 = > BLOCK_CNT , 6 = > x " 0000 " , 7 = > x " 0000 " ) |
Signals | |
| bl_ram_out | std_logic_vector ( 15 downto 0 ) |
| bl_reg_out | std_logic_vector ( 31 downto 0 ) |
| c_brd_mode | std_logic_vector ( 15 downto 0 ) |
| dsp_reg_reset | std_logic_vector ( 11 downto 0 ) |
| reset_flag | std_logic_vector ( 7 downto 0 ) |
| reset_val | std_logic_vector ( 7 downto 0 ) |
| reset_val_0 | std_logic_vector ( 7 downto 0 ) |
| reset_val_1 | std_logic_vector ( 7 downto 0 ) |
| reset_host | std_logic_vector ( 7 downto 0 ) |
| brd_status_i | std_logic_vector ( 15 downto 0 ) |
Attributes | |
| tig | string |
| tig | " yes " |
Component Instantiations | |
| bl_ram | ctrl_ram16_v1 <Entity ctrl_ram16_v1> |
Подробное описание
См. определение в файле block_pe_main.vhd строка 106
Объявления и описания членов класса находятся в файле:
- pcie_src/components/block_main/block_pe_main.vhd
