DS_DMA
|
Architectures | |
v6_pcie | Architecture |
Libraries | |
ieee | |
Packages | |
std_logic_1164 | |
std_logic_unsigned | |
Generics | |
PL_FAST_TRAIN | boolean := false |
REF_CLK_FREQ | integer := 0 |
Ports | |
ref_clk | in std_logic |
sys_reset_n | in std_logic |
delayed_sys_reset_n | out std_logic |
См. определение в файле pcie_reset_delay_v6.vhd строка 63