DS_DMA
|
Architectures | |
v6_pcie | Architecture |
Libraries | |
ieee | |
Packages | |
std_logic_1164 | |
std_logic_unsigned | |
Generics | |
C_SIMULATION | integer := 0 |
Ports | |
ENPMAPHASEALIGN | out std_logic |
PMASETPHASE | out std_logic |
SYNC_DONE | out std_logic |
OUT_DIV_RESET | out std_logic |
PCS_RESET | out std_logic |
USER_PHYSTATUS | out std_logic |
TXALIGNDISABLE | out std_logic |
DELAYALIGNRESET | out std_logic |
USER_CLK | in std_logic |
RESET | in std_logic |
RATE | in std_logic |
RATEDONE | in std_logic |
GT_PHYSTATUS | in std_logic |
RESETDONE | in std_logic |
См. определение в файле gtx_tx_sync_rate_v6.vhd строка 64