DS_DMA
|
Processes | |
PROCESS_72 | ( pipe_clk ) |
PROCESS_73 | ( pipe_clk ) |
Constants | |
TCQ | integer := 1 |
Signals | |
pipe_tx_rcvr_det_q | std_logic |
pipe_tx_reset_q | std_logic |
pipe_tx_rate_q | std_logic |
pipe_tx_deemph_q | std_logic |
pipe_tx_margin_q | std_logic_vector ( 2 downto 0 ) |
pipe_tx_swing_q | std_logic |
pipe_tx_rcvr_det_qq | std_logic |
pipe_tx_reset_qq | std_logic |
pipe_tx_rate_qq | std_logic |
pipe_tx_deemph_qq | std_logic |
pipe_tx_margin_qq | std_logic_vector ( 2 downto 0 ) |
pipe_tx_swing_qq | std_logic |
См. определение в файле pcie_pipe_misc_v6.vhd строка 85