DS_DMA
pcie_src/pcie_core64_m1/source_virtex6/pcie_2_0_v6.vhd
00001 -------------------------------------------------------------------------------
00002 --
00003 -- (c) Copyright 2009-2011 Xilinx, Inc. All rights reserved.
00004 --
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00008 -- laws.
00009 --
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00013 -- otherwise provided in a valid license issued to you by
00014 -- Xilinx, and to the maximum extent permitted by applicable
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00016 -- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
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00027 -- loss or damage suffered as a result of any action brought
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00046 -- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
00047 -- PART OF THIS FILE AT ALL TIMES.
00048 --
00049 -------------------------------------------------------------------------------
00050 -- Project    : Virtex-6 Integrated Block for PCI Express
00051 -- File       : pcie_2_0_v6.vhd
00052 -- Version    : 2.3
00053 -- Description: Solution wrapper for Virtex6 Hard Block for PCI Express
00054 --             
00055 --            
00056 --
00057 --------------------------------------------------------------------------------
00058 
00059 library ieee;
00060    use ieee.std_logic_1164.all;
00061    use ieee.std_logic_unsigned.all;
00062 
00063 library unisim;
00064 use unisim.vcomponents.all;
00065 
00066 entity pcie_2_0_v6 is
00067    generic (
00068       TCQ                                          : integer := 1;
00069       REF_CLK_FREQ                                 : integer := 0;              -- 0 - 100 MHz, 1 - 125 MHz, 2 - 250 MHz
00070       PIPE_PIPELINE_STAGES                         : integer := 0;              -- 0 - 0 stages, 1 - 1 stage, 2 - 2 stages
00071       LINK_CAP_MAX_LINK_WIDTH_int                  : integer := 8;
00072       AER_BASE_PTR                                 : bit_vector := X"128";
00073       AER_CAP_ECRC_CHECK_CAPABLE                   : boolean := FALSE;
00074       AER_CAP_ECRC_GEN_CAPABLE                     : boolean := FALSE;
00075       AER_CAP_ID                                   : bit_vector := X"0001";
00076       AER_CAP_INT_MSG_NUM_MSI                      : bit_vector := X"0A";
00077       AER_CAP_INT_MSG_NUM_MSIX                     : bit_vector := X"15";
00078       AER_CAP_NEXTPTR                              : bit_vector := X"160";
00079       AER_CAP_ON                                   : boolean := FALSE;
00080       AER_CAP_PERMIT_ROOTERR_UPDATE                : boolean := TRUE;
00081       AER_CAP_VERSION                              : bit_vector := X"1";
00082       ALLOW_X8_GEN2                                : boolean := FALSE;
00083       BAR0                                         : bit_vector := X"FFFFFF00";
00084       BAR1                                         : bit_vector := X"FFFF0000";
00085       BAR2                                         : bit_vector := X"FFFF000C";
00086       BAR3                                         : bit_vector := X"FFFFFFFF";
00087       BAR4                                         : bit_vector := X"00000000";
00088       BAR5                                         : bit_vector := X"00000000";
00089       CAPABILITIES_PTR                             : bit_vector := X"40";
00090       CARDBUS_CIS_POINTER                          : bit_vector := X"00000000";
00091       CLASS_CODE                                   : bit_vector := X"000000";
00092       CMD_INTX_IMPLEMENTED                         : boolean := TRUE;
00093       CPL_TIMEOUT_DISABLE_SUPPORTED                : boolean := FALSE;
00094       CPL_TIMEOUT_RANGES_SUPPORTED                 : bit_vector := X"0";
00095       CRM_MODULE_RSTS                              : bit_vector := X"00";
00096       DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE          : boolean := TRUE;
00097       DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE          : boolean := TRUE;
00098       DEV_CAP_ENDPOINT_L0S_LATENCY                 : integer := 0;
00099       DEV_CAP_ENDPOINT_L1_LATENCY                  : integer := 0;
00100       DEV_CAP_EXT_TAG_SUPPORTED                    : boolean := TRUE;
00101       DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE         : boolean := FALSE;
00102       DEV_CAP_MAX_PAYLOAD_SUPPORTED                : integer := 2;
00103       DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT            : integer := 0;
00104       DEV_CAP_ROLE_BASED_ERROR                     : boolean := TRUE;
00105       DEV_CAP_RSVD_14_12                           : integer := 0;
00106       DEV_CAP_RSVD_17_16                           : integer := 0;
00107       DEV_CAP_RSVD_31_29                           : integer := 0;
00108       DEV_CONTROL_AUX_POWER_SUPPORTED              : boolean := FALSE;
00109       DEVICE_ID                                    : bit_vector := X"0007";
00110       DISABLE_ASPM_L1_TIMER                        : boolean := FALSE;
00111       DISABLE_BAR_FILTERING                        : boolean := FALSE;
00112       DISABLE_ID_CHECK                             : boolean := FALSE;
00113       DISABLE_LANE_REVERSAL                        : boolean := FALSE;
00114       DISABLE_RX_TC_FILTER                         : boolean := FALSE;
00115       DISABLE_SCRAMBLING                           : boolean := FALSE;
00116       DNSTREAM_LINK_NUM                            : bit_vector := X"00";
00117       DSN_BASE_PTR                                 : bit_vector := X"100";
00118       DSN_CAP_ID                                   : bit_vector := X"0003";
00119       DSN_CAP_NEXTPTR                              : bit_vector := X"000";
00120       DSN_CAP_ON                                   : boolean := TRUE;
00121       DSN_CAP_VERSION                              : bit_vector := X"1";
00122       ENABLE_MSG_ROUTE                             : bit_vector := X"000";
00123       ENABLE_RX_TD_ECRC_TRIM                       : boolean := FALSE;
00124       ENTER_RVRY_EI_L0                             : boolean := TRUE;
00125       EXPANSION_ROM                                : bit_vector := X"FFFFF001";
00126       EXT_CFG_CAP_PTR                              : bit_vector := X"3F";
00127       EXT_CFG_XP_CAP_PTR                           : bit_vector := X"3FF";
00128       HEADER_TYPE                                  : bit_vector := X"00";
00129       INFER_EI                                     : bit_vector := X"00";
00130       INTERRUPT_PIN                                : bit_vector := X"01";
00131       IS_SWITCH                                    : boolean := FALSE;
00132       LAST_CONFIG_DWORD                            : bit_vector := X"042";
00133       LINK_CAP_ASPM_SUPPORT                        : integer := 1;
00134       LINK_CAP_CLOCK_POWER_MANAGEMENT              : boolean := FALSE;
00135       LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP       : boolean := FALSE;
00136       LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1        : integer := 7;
00137       LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2        : integer := 7;
00138       LINK_CAP_L0S_EXIT_LATENCY_GEN1               : integer := 7;
00139       LINK_CAP_L0S_EXIT_LATENCY_GEN2               : integer := 7;
00140       LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1         : integer := 7;
00141       LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2         : integer := 7;
00142       LINK_CAP_L1_EXIT_LATENCY_GEN1                : integer := 7;
00143       LINK_CAP_L1_EXIT_LATENCY_GEN2                : integer := 7;
00144       LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP     : boolean := FALSE;
00145       LINK_CAP_MAX_LINK_SPEED                      : bit_vector := X"1";
00146       LINK_CAP_MAX_LINK_WIDTH                      : bit_vector := X"08";
00147       LINK_CAP_RSVD_23_22                          : integer := 0;
00148       LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE         : boolean := FALSE;
00149       LINK_CONTROL_RCB                             : integer := 0;
00150       LINK_CTRL2_DEEMPHASIS                        : boolean := FALSE;
00151       LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE       : boolean := FALSE;
00152       LINK_CTRL2_TARGET_LINK_SPEED                 : bit_vector := X"2";
00153       LINK_STATUS_SLOT_CLOCK_CONFIG                : boolean := TRUE;
00154       LL_ACK_TIMEOUT                               : bit_vector := X"0000";
00155       LL_ACK_TIMEOUT_EN                            : boolean := FALSE;
00156       LL_ACK_TIMEOUT_FUNC                          : integer := 0;
00157       LL_REPLAY_TIMEOUT                            : bit_vector := X"0000";
00158       LL_REPLAY_TIMEOUT_EN                         : boolean := FALSE;
00159       LL_REPLAY_TIMEOUT_FUNC                       : integer := 0;
00160       LTSSM_MAX_LINK_WIDTH                         : bit_vector := X"01";
00161       MSI_BASE_PTR                                 : bit_vector := X"48";
00162       MSI_CAP_ID                                   : bit_vector := X"05";
00163       MSI_CAP_MULTIMSGCAP                          : integer := 0;
00164       MSI_CAP_MULTIMSG_EXTENSION                   : integer := 0;
00165       MSI_CAP_NEXTPTR                              : bit_vector := X"60";
00166       MSI_CAP_ON                                   : boolean := FALSE;
00167       MSI_CAP_PER_VECTOR_MASKING_CAPABLE           : boolean := TRUE;
00168       MSI_CAP_64_BIT_ADDR_CAPABLE                  : boolean := TRUE;
00169       MSIX_BASE_PTR                                : bit_vector := X"9C";
00170       MSIX_CAP_ID                                  : bit_vector := X"11";
00171       MSIX_CAP_NEXTPTR                             : bit_vector := X"00";
00172       MSIX_CAP_ON                                  : boolean := FALSE;
00173       MSIX_CAP_PBA_BIR                             : integer := 0;
00174       MSIX_CAP_PBA_OFFSET                          : bit_vector := X"00000050";
00175       MSIX_CAP_TABLE_BIR                           : integer := 0;
00176       MSIX_CAP_TABLE_OFFSET                        : bit_vector := X"00000040";
00177       MSIX_CAP_TABLE_SIZE                          : bit_vector := X"000";
00178       N_FTS_COMCLK_GEN1                            : integer := 255;
00179       N_FTS_COMCLK_GEN2                            : integer := 255;
00180       N_FTS_GEN1                                   : integer := 255;
00181       N_FTS_GEN2                                   : integer := 255;
00182       PCIE_BASE_PTR                                : bit_vector := X"60";
00183       PCIE_CAP_CAPABILITY_ID                       : bit_vector := X"10";
00184       PCIE_CAP_CAPABILITY_VERSION                  : bit_vector := X"2";
00185       PCIE_CAP_DEVICE_PORT_TYPE                    : bit_vector := X"0";
00186       PCIE_CAP_INT_MSG_NUM                         : bit_vector := X"00";
00187       PCIE_CAP_NEXTPTR                             : bit_vector := X"00";
00188       PCIE_CAP_ON                                  : boolean := TRUE;
00189       PCIE_CAP_RSVD_15_14                          : integer := 0;
00190       PCIE_CAP_SLOT_IMPLEMENTED                    : boolean := FALSE;
00191       PCIE_REVISION                                : integer := 2;
00192       PGL0_LANE                                    : integer := 0;
00193       PGL1_LANE                                    : integer := 1;
00194       PGL2_LANE                                    : integer := 2;
00195       PGL3_LANE                                    : integer := 3;
00196       PGL4_LANE                                    : integer := 4;
00197       PGL5_LANE                                    : integer := 5;
00198       PGL6_LANE                                    : integer := 6;
00199       PGL7_LANE                                    : integer := 7;
00200       PL_AUTO_CONFIG                               : integer := 0;
00201       PL_FAST_TRAIN                                : boolean := FALSE;
00202       PM_BASE_PTR                                  : bit_vector := X"40";
00203       PM_CAP_AUXCURRENT                            : integer := 0;
00204       PM_CAP_DSI                                   : boolean := FALSE;
00205       PM_CAP_D1SUPPORT                             : boolean := TRUE;
00206       PM_CAP_D2SUPPORT                             : boolean := TRUE;
00207       PM_CAP_ID                                    : bit_vector := X"11";
00208       PM_CAP_NEXTPTR                               : bit_vector := X"48";
00209       PM_CAP_ON                                    : boolean := TRUE;
00210       PM_CAP_PME_CLOCK                             : boolean := FALSE;
00211       PM_CAP_PMESUPPORT                            : bit_vector := X"0F";
00212       PM_CAP_RSVD_04                               : integer := 0;
00213       PM_CAP_VERSION                               : integer := 3;
00214       PM_CSR_BPCCEN                                : boolean := FALSE;
00215       PM_CSR_B2B3                                  : boolean := FALSE;
00216       PM_CSR_NOSOFTRST                             : boolean := TRUE;
00217       PM_DATA0                                     : bit_vector := X"01";
00218       PM_DATA1                                     : bit_vector := X"01";
00219       PM_DATA2                                     : bit_vector := X"01";
00220       PM_DATA3                                     : bit_vector := X"01";
00221       PM_DATA4                                     : bit_vector := X"01";
00222       PM_DATA5                                     : bit_vector := X"01";
00223       PM_DATA6                                     : bit_vector := X"01";
00224       PM_DATA7                                     : bit_vector := X"01";
00225       PM_DATA_SCALE0                               : bit_vector := X"1";
00226       PM_DATA_SCALE1                               : bit_vector := X"1";
00227       PM_DATA_SCALE2                               : bit_vector := X"1";
00228       PM_DATA_SCALE3                               : bit_vector := X"1";
00229       PM_DATA_SCALE4                               : bit_vector := X"1";
00230       PM_DATA_SCALE5                               : bit_vector := X"1";
00231       PM_DATA_SCALE6                               : bit_vector := X"1";
00232       PM_DATA_SCALE7                               : bit_vector := X"1";
00233       RECRC_CHK                                    : integer := 0;
00234       RECRC_CHK_TRIM                               : boolean := FALSE;
00235       REVISION_ID                                  : bit_vector := X"00";
00236       ROOT_CAP_CRS_SW_VISIBILITY                   : boolean := FALSE;
00237       SELECT_DLL_IF                                : boolean := FALSE;
00238       SLOT_CAP_ATT_BUTTON_PRESENT                  : boolean := FALSE;
00239       SLOT_CAP_ATT_INDICATOR_PRESENT               : boolean := FALSE;
00240       SLOT_CAP_ELEC_INTERLOCK_PRESENT              : boolean := FALSE;
00241       SLOT_CAP_HOTPLUG_CAPABLE                     : boolean := FALSE;
00242       SLOT_CAP_HOTPLUG_SURPRISE                    : boolean := FALSE;
00243       SLOT_CAP_MRL_SENSOR_PRESENT                  : boolean := FALSE;
00244       SLOT_CAP_NO_CMD_COMPLETED_SUPPORT            : boolean := FALSE;
00245       SLOT_CAP_PHYSICAL_SLOT_NUM                   : bit_vector := X"0000";
00246       SLOT_CAP_POWER_CONTROLLER_PRESENT            : boolean := FALSE;
00247       SLOT_CAP_POWER_INDICATOR_PRESENT             : boolean := FALSE;
00248       SLOT_CAP_SLOT_POWER_LIMIT_SCALE              : integer := 0;
00249       SLOT_CAP_SLOT_POWER_LIMIT_VALUE              : bit_vector := X"00";
00250       SPARE_BIT0                                   : integer := 0;
00251       SPARE_BIT1                                   : integer := 0;
00252       SPARE_BIT2                                   : integer := 0;
00253       SPARE_BIT3                                   : integer := 0;
00254       SPARE_BIT4                                   : integer := 0;
00255       SPARE_BIT5                                   : integer := 0;
00256       SPARE_BIT6                                   : integer := 0;
00257       SPARE_BIT7                                   : integer := 0;
00258       SPARE_BIT8                                   : integer := 0;
00259       SPARE_BYTE0                                  : bit_vector := X"00";
00260       SPARE_BYTE1                                  : bit_vector := X"00";
00261       SPARE_BYTE2                                  : bit_vector := X"00";
00262       SPARE_BYTE3                                  : bit_vector := X"00";
00263       SPARE_WORD0                                  : bit_vector := X"00000000";
00264       SPARE_WORD1                                  : bit_vector := X"00000000";
00265       SPARE_WORD2                                  : bit_vector := X"00000000";
00266       SPARE_WORD3                                  : bit_vector := X"00000000";
00267       SUBSYSTEM_ID                                 : bit_vector := X"0007";
00268       SUBSYSTEM_VENDOR_ID                          : bit_vector := X"10EE";
00269       TL_RBYPASS                                   : boolean := FALSE;
00270       TL_RX_RAM_RADDR_LATENCY                      : integer := 0;
00271       TL_RX_RAM_RDATA_LATENCY                      : integer := 2;
00272       TL_RX_RAM_WRITE_LATENCY                      : integer := 0;
00273       TL_TFC_DISABLE                               : boolean := FALSE;
00274       TL_TX_CHECKS_DISABLE                         : boolean := FALSE;
00275       TL_TX_RAM_RADDR_LATENCY                      : integer := 0;
00276       TL_TX_RAM_RDATA_LATENCY                      : integer := 2;
00277       TL_TX_RAM_WRITE_LATENCY                      : integer := 0;
00278       UPCONFIG_CAPABLE                             : boolean := TRUE;
00279       UPSTREAM_FACING                              : boolean := TRUE;
00280       UR_INV_REQ                                   : boolean := TRUE;
00281       USER_CLK_FREQ                                : integer := 3;
00282       EXIT_LOOPBACK_ON_EI                          : boolean := TRUE;
00283       VC_BASE_PTR                                  : bit_vector := X"10C";
00284       VC_CAP_ID                                    : bit_vector := X"0002";
00285       VC_CAP_NEXTPTR                               : bit_vector := X"000";
00286       VC_CAP_ON                                    : boolean := FALSE;
00287       VC_CAP_REJECT_SNOOP_TRANSACTIONS             : boolean := FALSE;
00288       VC_CAP_VERSION                               : bit_vector := X"1";
00289       VC0_CPL_INFINITE                             : boolean := TRUE;
00290       VC0_RX_RAM_LIMIT                             : bit_vector := X"03FF";
00291       VC0_TOTAL_CREDITS_CD                         : integer := 127;
00292       VC0_TOTAL_CREDITS_CH                         : integer := 31;
00293       VC0_TOTAL_CREDITS_NPH                        : integer := 12;
00294       VC0_TOTAL_CREDITS_PD                         : integer := 288;
00295       VC0_TOTAL_CREDITS_PH                         : integer := 32;
00296       VC0_TX_LASTPACKET                            : integer := 31;
00297       VENDOR_ID                                    : bit_vector := X"10EE";
00298       VSEC_BASE_PTR                                : bit_vector := X"160";
00299       VSEC_CAP_HDR_ID                              : bit_vector := X"1234";
00300       VSEC_CAP_HDR_LENGTH                          : bit_vector := X"018";
00301       VSEC_CAP_HDR_REVISION                        : bit_vector := X"1";
00302       VSEC_CAP_ID                                  : bit_vector := X"000B";
00303       VSEC_CAP_IS_LINK_VISIBLE                     : boolean := TRUE;
00304       VSEC_CAP_NEXTPTR                             : bit_vector := X"000";
00305       VSEC_CAP_ON                                  : boolean := FALSE;
00306       VSEC_CAP_VERSION                             : bit_vector := X"1"
00307    );
00308    port (
00309       
00310       PCIEXPRXN                                    : in std_logic_vector((LINK_CAP_MAX_LINK_WIDTH_int - 1) downto 0);
00311       PCIEXPRXP                                    : in std_logic_vector((LINK_CAP_MAX_LINK_WIDTH_int - 1) downto 0);
00312       PCIEXPTXN                                    : out std_logic_vector((LINK_CAP_MAX_LINK_WIDTH_int - 1) downto 0);
00313       PCIEXPTXP                                    : out std_logic_vector((LINK_CAP_MAX_LINK_WIDTH_int - 1) downto 0);
00314       
00315       SYSCLK                                       : in std_logic;
00316       FUNDRSTN                                     : in std_logic;
00317       
00318       TRNLNKUPN                                    : out std_logic;
00319       
00320       PHYRDYN                                      : out std_logic;
00321       USERRSTN                                     : out std_logic;
00322       RECEIVEDFUNCLVLRSTN                          : out std_logic;
00323       LNKCLKEN                                     : out std_logic;
00324       SYSRSTN                                      : in std_logic;
00325       PLRSTN                                       : in std_logic;
00326       DLRSTN                                       : in std_logic;
00327       TLRSTN                                       : in std_logic;
00328       FUNCLVLRSTN                                  : in std_logic;
00329       CMRSTN                                       : in std_logic;
00330       CMSTICKYRSTN                                 : in std_logic;
00331       
00332       TRNRBARHITN                                  : out std_logic_vector(6 downto 0);
00333       TRNRD                                        : out std_logic_vector(63 downto 0);
00334       TRNRECRCERRN                                 : out std_logic;
00335       TRNREOFN                                     : out std_logic;
00336       
00337       TRNRERRFWDN                                  : out std_logic;
00338       TRNRREMN                                     : out std_logic;
00339       TRNRSOFN                                     : out std_logic;
00340       TRNRSRCDSCN                                  : out std_logic;
00341       TRNRSRCRDYN                                  : out std_logic;
00342       TRNRDSTRDYN                                  : in std_logic;
00343       TRNRNPOKN                                    : in std_logic;
00344       
00345       TRNRDLLPDATA                                 : out std_logic_vector(31 downto 0);
00346       TRNRDLLPSRCRDYN                              : out std_logic;
00347 
00348       TRNTBUFAV                                    : out std_logic_vector(5 downto 0);
00349       TRNTCFGREQN                                  : out std_logic;
00350       
00351       TRNTDLLPDSTRDYN                              : out std_logic;
00352       TRNTDSTRDYN                                  : out std_logic;
00353       
00354       TRNTERRDROPN                                 : out std_logic;
00355       
00356       TRNTCFGGNTN                                  : in std_logic;
00357       
00358       TRNTD                                        : in std_logic_vector(63 downto 0);
00359       TRNTDLLPDATA                                 : in std_logic_vector(31 downto 0);
00360       TRNTDLLPSRCRDYN                              : in std_logic;
00361       TRNTECRCGENN                                 : in std_logic;
00362       TRNTEOFN                                     : in std_logic;
00363       
00364       TRNTERRFWDN                                  : in std_logic;
00365       TRNTREMN                                     : in std_logic;
00366       
00367       TRNTSOFN                                     : in std_logic;
00368       TRNTSRCDSCN                                  : in std_logic;
00369       TRNTSRCRDYN                                  : in std_logic;
00370       TRNTSTRN                                     : in std_logic;
00371       
00372       TRNFCCPLD                                    : out std_logic_vector(11 downto 0);
00373       TRNFCCPLH                                    : out std_logic_vector(7 downto 0);
00374       TRNFCNPD                                     : out std_logic_vector(11 downto 0);
00375       TRNFCNPH                                     : out std_logic_vector(7 downto 0);
00376       TRNFCPD                                      : out std_logic_vector(11 downto 0);
00377       TRNFCPH                                      : out std_logic_vector(7 downto 0);
00378       TRNFCSEL                                     : in std_logic_vector(2 downto 0);
00379       
00380       CFGAERECRCCHECKEN                            : out std_logic;
00381       CFGAERECRCGENEN                              : out std_logic;
00382       CFGCOMMANDBUSMASTERENABLE                    : out std_logic;
00383       CFGCOMMANDINTERRUPTDISABLE                   : out std_logic;
00384       CFGCOMMANDIOENABLE                           : out std_logic;
00385       CFGCOMMANDMEMENABLE                          : out std_logic;
00386       CFGCOMMANDSERREN                             : out std_logic;
00387       CFGDEVCONTROLAUXPOWEREN                      : out std_logic;
00388       CFGDEVCONTROLCORRERRREPORTINGEN              : out std_logic;
00389       CFGDEVCONTROLENABLERO                        : out std_logic;
00390       CFGDEVCONTROLEXTTAGEN                        : out std_logic;
00391       CFGDEVCONTROLFATALERRREPORTINGEN             : out std_logic;
00392       CFGDEVCONTROLMAXPAYLOAD                      : out std_logic_vector(2 downto 0);
00393       CFGDEVCONTROLMAXREADREQ                      : out std_logic_vector(2 downto 0);
00394       CFGDEVCONTROLNONFATALREPORTINGEN             : out std_logic;
00395       CFGDEVCONTROLNOSNOOPEN                       : out std_logic;
00396       CFGDEVCONTROLPHANTOMEN                       : out std_logic;
00397       CFGDEVCONTROLURERRREPORTINGEN                : out std_logic;
00398       CFGDEVCONTROL2CPLTIMEOUTDIS                  : out std_logic;
00399       CFGDEVCONTROL2CPLTIMEOUTVAL                  : out std_logic_vector(3 downto 0);
00400       CFGDEVSTATUSCORRERRDETECTED                  : out std_logic;
00401       CFGDEVSTATUSFATALERRDETECTED                 : out std_logic;
00402       CFGDEVSTATUSNONFATALERRDETECTED              : out std_logic;
00403       CFGDEVSTATUSURDETECTED                       : out std_logic;
00404       CFGDO                                        : out std_logic_vector(31 downto 0);
00405       CFGERRAERHEADERLOGSETN                       : out std_logic;
00406       CFGERRCPLRDYN                                : out std_logic;
00407       CFGINTERRUPTDO                               : out std_logic_vector(7 downto 0);
00408       CFGINTERRUPTMMENABLE                         : out std_logic_vector(2 downto 0);
00409       CFGINTERRUPTMSIENABLE                        : out std_logic;
00410       CFGINTERRUPTMSIXENABLE                       : out std_logic;
00411       CFGINTERRUPTMSIXFM                           : out std_logic;
00412       CFGINTERRUPTRDYN                             : out std_logic;
00413       CFGLINKCONTROLRCB                            : out std_logic;
00414       CFGLINKCONTROLASPMCONTROL                    : out std_logic_vector(1 downto 0);
00415       CFGLINKCONTROLAUTOBANDWIDTHINTEN             : out std_logic;
00416       CFGLINKCONTROLBANDWIDTHINTEN                 : out std_logic;
00417       CFGLINKCONTROLCLOCKPMEN                      : out std_logic;
00418       CFGLINKCONTROLCOMMONCLOCK                    : out std_logic;
00419       CFGLINKCONTROLEXTENDEDSYNC                   : out std_logic;
00420       CFGLINKCONTROLHWAUTOWIDTHDIS                 : out std_logic;
00421       CFGLINKCONTROLLINKDISABLE                    : out std_logic;
00422       CFGLINKCONTROLRETRAINLINK                    : out std_logic;
00423       CFGLINKSTATUSAUTOBANDWIDTHSTATUS             : out std_logic;
00424       CFGLINKSTATUSBANDWITHSTATUS                  : out std_logic;
00425       CFGLINKSTATUSCURRENTSPEED                    : out std_logic_vector(1 downto 0);
00426       CFGLINKSTATUSDLLACTIVE                       : out std_logic;
00427       CFGLINKSTATUSLINKTRAINING                    : out std_logic;
00428       CFGLINKSTATUSNEGOTIATEDWIDTH                 : out std_logic_vector(3 downto 0);
00429       CFGMSGDATA                                   : out std_logic_vector(15 downto 0);
00430       CFGMSGRECEIVED                               : out std_logic;
00431       CFGMSGRECEIVEDASSERTINTA                     : out std_logic;
00432       CFGMSGRECEIVEDASSERTINTB                     : out std_logic;
00433       CFGMSGRECEIVEDASSERTINTC                     : out std_logic;
00434       CFGMSGRECEIVEDASSERTINTD                     : out std_logic;
00435       CFGMSGRECEIVEDDEASSERTINTA                   : out std_logic;
00436       CFGMSGRECEIVEDDEASSERTINTB                   : out std_logic;
00437       CFGMSGRECEIVEDDEASSERTINTC                   : out std_logic;
00438       CFGMSGRECEIVEDDEASSERTINTD                   : out std_logic;
00439       CFGMSGRECEIVEDERRCOR                         : out std_logic;
00440       CFGMSGRECEIVEDERRFATAL                       : out std_logic;
00441       CFGMSGRECEIVEDERRNONFATAL                    : out std_logic;
00442       CFGMSGRECEIVEDPMASNAK                        : out std_logic;
00443       CFGMSGRECEIVEDPMETO                          : out std_logic;
00444       CFGMSGRECEIVEDPMETOACK                       : out std_logic;
00445       CFGMSGRECEIVEDPMPME                          : out std_logic;
00446       CFGMSGRECEIVEDSETSLOTPOWERLIMIT              : out std_logic;
00447       CFGMSGRECEIVEDUNLOCK                         : out std_logic;
00448       CFGPCIELINKSTATE                             : out std_logic_vector(2 downto 0);
00449       CFGPMCSRPMEEN                                : out std_logic;
00450       CFGPMCSRPMESTATUS                            : out std_logic;
00451       CFGPMCSRPOWERSTATE                           : out std_logic_vector(1 downto 0);
00452       CFGPMRCVASREQL1N                             : out std_logic;
00453       CFGPMRCVENTERL1N                             : out std_logic;
00454       CFGPMRCVENTERL23N                            : out std_logic;
00455       CFGPMRCVREQACKN                              : out std_logic;
00456       CFGRDWRDONEN                                 : out std_logic;
00457       CFGSLOTCONTROLELECTROMECHILCTLPULSE          : out std_logic;
00458       CFGTRANSACTION                               : out std_logic;
00459       CFGTRANSACTIONADDR                           : out std_logic_vector(6 downto 0);
00460       CFGTRANSACTIONTYPE                           : out std_logic;
00461       CFGVCTCVCMAP                                 : out std_logic_vector(6 downto 0);
00462       CFGBYTEENN                                   : in std_logic_vector(3 downto 0);
00463       CFGDI                                        : in std_logic_vector(31 downto 0);
00464       CFGDSBUSNUMBER                               : in std_logic_vector(7 downto 0);
00465       CFGDSDEVICENUMBER                            : in std_logic_vector(4 downto 0);
00466       CFGDSFUNCTIONNUMBER                          : in std_logic_vector(2 downto 0);
00467       CFGDSN                                       : in std_logic_vector(63 downto 0);
00468       CFGDWADDR                                    : in std_logic_vector(9 downto 0);
00469       CFGERRACSN                                   : in std_logic;
00470       CFGERRAERHEADERLOG                           : in std_logic_vector(127 downto 0);
00471       CFGERRCORN                                   : in std_logic;
00472       CFGERRCPLABORTN                              : in std_logic;
00473       CFGERRCPLTIMEOUTN                            : in std_logic;
00474       CFGERRCPLUNEXPECTN                           : in std_logic;
00475       CFGERRECRCN                                  : in std_logic;
00476       CFGERRLOCKEDN                                : in std_logic;
00477       CFGERRPOSTEDN                                : in std_logic;
00478       CFGERRTLPCPLHEADER                           : in std_logic_vector(47 downto 0);
00479       CFGERRURN                                    : in std_logic;
00480       CFGINTERRUPTASSERTN                          : in std_logic;
00481       CFGINTERRUPTDI                               : in std_logic_vector(7 downto 0);
00482       CFGINTERRUPTN                                : in std_logic;
00483       CFGPMDIRECTASPML1N                           : in std_logic;
00484       CFGPMSENDPMACKN                              : in std_logic;
00485       CFGPMSENDPMETON                              : in std_logic;
00486       CFGPMSENDPMNAKN                              : in std_logic;
00487       CFGPMTURNOFFOKN                              : in std_logic;
00488       CFGPMWAKEN                                   : in std_logic;
00489       CFGPORTNUMBER                                : in std_logic_vector(7 downto 0);
00490       CFGRDENN                                     : in std_logic;
00491       CFGTRNPENDINGN                               : in std_logic;
00492       CFGWRENN                                     : in std_logic;
00493       CFGWRREADONLYN                               : in std_logic;
00494       CFGWRRW1CASRWN                               : in std_logic;
00495       
00496       PLINITIALLINKWIDTH                           : out std_logic_vector(2 downto 0);
00497       PLLANEREVERSALMODE                           : out std_logic_vector(1 downto 0);
00498       PLLINKGEN2CAP                                : out std_logic;
00499       PLLINKPARTNERGEN2SUPPORTED                   : out std_logic;
00500       PLLINKUPCFGCAP                               : out std_logic;
00501       PLLTSSMSTATE                                 : out std_logic_vector(5 downto 0);
00502       PLPHYLNKUPN                                  : out std_logic;
00503       PLRECEIVEDHOTRST                             : out std_logic;
00504       PLRXPMSTATE                                  : out std_logic_vector(1 downto 0);
00505       PLSELLNKRATE                                 : out std_logic;
00506       PLSELLNKWIDTH                                : out std_logic_vector(1 downto 0);
00507       PLTXPMSTATE                                  : out std_logic_vector(2 downto 0);
00508       PLDIRECTEDLINKAUTON                          : in std_logic;
00509       PLDIRECTEDLINKCHANGE                         : in std_logic_vector(1 downto 0);
00510       PLDIRECTEDLINKSPEED                          : in std_logic;
00511       PLDIRECTEDLINKWIDTH                          : in std_logic_vector(1 downto 0);
00512       PLDOWNSTREAMDEEMPHSOURCE                     : in std_logic;
00513       PLUPSTREAMPREFERDEEMPH                       : in std_logic;
00514       PLTRANSMITHOTRST                             : in std_logic;
00515       
00516       DBGSCLRA                                     : out std_logic;
00517       DBGSCLRB                                     : out std_logic;
00518       DBGSCLRC                                     : out std_logic;
00519       DBGSCLRD                                     : out std_logic;
00520       DBGSCLRE                                     : out std_logic;
00521       DBGSCLRF                                     : out std_logic;
00522       DBGSCLRG                                     : out std_logic;
00523       DBGSCLRH                                     : out std_logic;
00524       DBGSCLRI                                     : out std_logic;
00525       DBGSCLRJ                                     : out std_logic;
00526       DBGSCLRK                                     : out std_logic;
00527       DBGVECA                                      : out std_logic_vector(63 downto 0);
00528       DBGVECB                                      : out std_logic_vector(63 downto 0);
00529       DBGVECC                                      : out std_logic_vector(11 downto 0);
00530       PLDBGVEC                                     : out std_logic_vector(11 downto 0);
00531       DBGMODE                                      : in std_logic_vector(1 downto 0);
00532       DBGSUBMODE                                   : in std_logic;
00533       PLDBGMODE                                    : in std_logic_vector(2 downto 0);
00534       PCIEDRPDO                                    : out std_logic_vector(15 downto 0);
00535       PCIEDRPDRDY                                  : out std_logic;
00536       PCIEDRPCLK                                   : in std_logic;
00537       PCIEDRPDADDR                                 : in std_logic_vector(8 downto 0);
00538       PCIEDRPDEN                                   : in std_logic;
00539       PCIEDRPDI                                    : in std_logic_vector(15 downto 0);
00540       PCIEDRPDWE                                   : in std_logic;
00541       
00542       GTPLLLOCK                                    : out std_logic;
00543       PIPECLK                                      : in std_logic;
00544       
00545       USERCLK                                      : in std_logic;
00546       DRPCLK                                       : in std_logic;
00547       CLOCKLOCKED                                  : in std_logic;
00548       
00549       TxOutClk                                     : out std_logic
00550    );
00551 end pcie_2_0_v6;
00552 
00553 architecture v6_pcie of pcie_2_0_v6 is
00554    
00555    component pcie_pipe_v6
00556      generic (
00557        NO_OF_LANES             : integer;
00558        LINK_CAP_MAX_LINK_SPEED : bit_vector;
00559        PIPE_PIPELINE_STAGES    : integer);
00560      port (
00561        pipe_tx_rcvr_det_i       : in  std_logic;
00562        pipe_tx_reset_i          : in  std_logic;
00563        pipe_tx_rate_i           : in  std_logic;
00564        pipe_tx_deemph_i         : in  std_logic;
00565        pipe_tx_margin_i         : in  std_logic_vector(2 downto 0);
00566        pipe_tx_swing_i          : in  std_logic;
00567        pipe_tx_rcvr_det_o       : out std_logic;
00568        pipe_tx_reset_o          : out std_logic;
00569        pipe_tx_rate_o           : out std_logic;
00570        pipe_tx_deemph_o         : out std_logic;
00571        pipe_tx_margin_o         : out std_logic_vector(2 downto 0);
00572        pipe_tx_swing_o          : out std_logic;
00573        pipe_rx0_char_is_k_o     : out std_logic_vector(1 downto 0);
00574        pipe_rx0_data_o          : out std_logic_vector(15 downto 0);
00575        pipe_rx0_valid_o         : out std_logic;
00576        pipe_rx0_chanisaligned_o : out std_logic;
00577        pipe_rx0_status_o        : out std_logic_vector(2 downto 0);
00578        pipe_rx0_phy_status_o    : out std_logic;
00579        pipe_rx0_elec_idle_o     : out std_logic;
00580        pipe_rx0_polarity_i      : in  std_logic;
00581        pipe_tx0_compliance_i    : in  std_logic;
00582        pipe_tx0_char_is_k_i     : in  std_logic_vector(1 downto 0);
00583        pipe_tx0_data_i          : in  std_logic_vector(15 downto 0);
00584        pipe_tx0_elec_idle_i     : in  std_logic;
00585        pipe_tx0_powerdown_i     : in  std_logic_vector(1 downto 0);
00586        pipe_rx0_char_is_k_i     : in  std_logic_vector(1 downto 0);
00587        pipe_rx0_data_i          : in  std_logic_vector(15 downto 0);
00588        pipe_rx0_valid_i         : in  std_logic;
00589        pipe_rx0_chanisaligned_i : in  std_logic;
00590        pipe_rx0_status_i        : in  std_logic_vector(2 downto 0);
00591        pipe_rx0_phy_status_i    : in  std_logic;
00592        pipe_rx0_elec_idle_i     : in  std_logic;
00593        pipe_rx0_polarity_o      : out std_logic;
00594        pipe_tx0_compliance_o    : out std_logic;
00595        pipe_tx0_char_is_k_o     : out std_logic_vector(1 downto 0);
00596        pipe_tx0_data_o          : out std_logic_vector(15 downto 0);
00597        pipe_tx0_elec_idle_o     : out std_logic;
00598        pipe_tx0_powerdown_o     : out std_logic_vector(1 downto 0);
00599        pipe_rx1_char_is_k_o     : out std_logic_vector(1 downto 0);
00600        pipe_rx1_data_o          : out std_logic_vector(15 downto 0);
00601        pipe_rx1_valid_o         : out std_logic;
00602        pipe_rx1_chanisaligned_o : out std_logic;
00603        pipe_rx1_status_o        : out std_logic_vector(2 downto 0);
00604        pipe_rx1_phy_status_o    : out std_logic;
00605        pipe_rx1_elec_idle_o     : out std_logic;
00606        pipe_rx1_polarity_i      : in  std_logic;
00607        pipe_tx1_compliance_i    : in  std_logic;
00608        pipe_tx1_char_is_k_i     : in  std_logic_vector(1 downto 0);
00609        pipe_tx1_data_i          : in  std_logic_vector(15 downto 0);
00610        pipe_tx1_elec_idle_i     : in  std_logic;
00611        pipe_tx1_powerdown_i     : in  std_logic_vector(1 downto 0);
00612        pipe_rx1_char_is_k_i     : in  std_logic_vector(1 downto 0);
00613        pipe_rx1_data_i          : in  std_logic_vector(15 downto 0);
00614        pipe_rx1_valid_i         : in  std_logic;
00615        pipe_rx1_chanisaligned_i : in  std_logic;
00616        pipe_rx1_status_i        : in  std_logic_vector(2 downto 0);
00617        pipe_rx1_phy_status_i    : in  std_logic;
00618        pipe_rx1_elec_idle_i     : in  std_logic;
00619        pipe_rx1_polarity_o      : out std_logic;
00620        pipe_tx1_compliance_o    : out std_logic;
00621        pipe_tx1_char_is_k_o     : out std_logic_vector(1 downto 0);
00622        pipe_tx1_data_o          : out std_logic_vector(15 downto 0);
00623        pipe_tx1_elec_idle_o     : out std_logic;
00624        pipe_tx1_powerdown_o     : out std_logic_vector(1 downto 0);
00625        pipe_rx2_char_is_k_o     : out std_logic_vector(1 downto 0);
00626        pipe_rx2_data_o          : out std_logic_vector(15 downto 0);
00627        pipe_rx2_valid_o         : out std_logic;
00628        pipe_rx2_chanisaligned_o : out std_logic;
00629        pipe_rx2_status_o        : out std_logic_vector(2 downto 0);
00630        pipe_rx2_phy_status_o    : out std_logic;
00631        pipe_rx2_elec_idle_o     : out std_logic;
00632        pipe_rx2_polarity_i      : in  std_logic;
00633        pipe_tx2_compliance_i    : in  std_logic;
00634        pipe_tx2_char_is_k_i     : in  std_logic_vector(1 downto 0);
00635        pipe_tx2_data_i          : in  std_logic_vector(15 downto 0);
00636        pipe_tx2_elec_idle_i     : in  std_logic;
00637        pipe_tx2_powerdown_i     : in  std_logic_vector(1 downto 0);
00638        pipe_rx2_char_is_k_i     : in  std_logic_vector(1 downto 0);
00639        pipe_rx2_data_i          : in  std_logic_vector(15 downto 0);
00640        pipe_rx2_valid_i         : in  std_logic;
00641        pipe_rx2_chanisaligned_i : in  std_logic;
00642        pipe_rx2_status_i        : in  std_logic_vector(2 downto 0);
00643        pipe_rx2_phy_status_i    : in  std_logic;
00644        pipe_rx2_elec_idle_i     : in  std_logic;
00645        pipe_rx2_polarity_o      : out std_logic;
00646        pipe_tx2_compliance_o    : out std_logic;
00647        pipe_tx2_char_is_k_o     : out std_logic_vector(1 downto 0);
00648        pipe_tx2_data_o          : out std_logic_vector(15 downto 0);
00649        pipe_tx2_elec_idle_o     : out std_logic;
00650        pipe_tx2_powerdown_o     : out std_logic_vector(1 downto 0);
00651        pipe_rx3_char_is_k_o     : out std_logic_vector(1 downto 0);
00652        pipe_rx3_data_o          : out std_logic_vector(15 downto 0);
00653        pipe_rx3_valid_o         : out std_logic;
00654        pipe_rx3_chanisaligned_o : out std_logic;
00655        pipe_rx3_status_o        : out std_logic_vector(2 downto 0);
00656        pipe_rx3_phy_status_o    : out std_logic;
00657        pipe_rx3_elec_idle_o     : out std_logic;
00658        pipe_rx3_polarity_i      : in  std_logic;
00659        pipe_tx3_compliance_i    : in  std_logic;
00660        pipe_tx3_char_is_k_i     : in  std_logic_vector(1 downto 0);
00661        pipe_tx3_data_i          : in  std_logic_vector(15 downto 0);
00662        pipe_tx3_elec_idle_i     : in  std_logic;
00663        pipe_tx3_powerdown_i     : in  std_logic_vector(1 downto 0);
00664        pipe_rx3_char_is_k_i     : in  std_logic_vector(1 downto 0);
00665        pipe_rx3_data_i          : in  std_logic_vector(15 downto 0);
00666        pipe_rx3_valid_i         : in  std_logic;
00667        pipe_rx3_chanisaligned_i : in  std_logic;
00668        pipe_rx3_status_i        : in  std_logic_vector(2 downto 0);
00669        pipe_rx3_phy_status_i    : in  std_logic;
00670        pipe_rx3_elec_idle_i     : in  std_logic;
00671        pipe_rx3_polarity_o      : out std_logic;
00672        pipe_tx3_compliance_o    : out std_logic;
00673        pipe_tx3_char_is_k_o     : out std_logic_vector(1 downto 0);
00674        pipe_tx3_data_o          : out std_logic_vector(15 downto 0);
00675        pipe_tx3_elec_idle_o     : out std_logic;
00676        pipe_tx3_powerdown_o     : out std_logic_vector(1 downto 0);
00677        pipe_rx4_char_is_k_o     : out std_logic_vector(1 downto 0);
00678        pipe_rx4_data_o          : out std_logic_vector(15 downto 0);
00679        pipe_rx4_valid_o         : out std_logic;
00680        pipe_rx4_chanisaligned_o : out std_logic;
00681        pipe_rx4_status_o        : out std_logic_vector(2 downto 0);
00682        pipe_rx4_phy_status_o    : out std_logic;
00683        pipe_rx4_elec_idle_o     : out std_logic;
00684        pipe_rx4_polarity_i      : in  std_logic;
00685        pipe_tx4_compliance_i    : in  std_logic;
00686        pipe_tx4_char_is_k_i     : in  std_logic_vector(1 downto 0);
00687        pipe_tx4_data_i          : in  std_logic_vector(15 downto 0);
00688        pipe_tx4_elec_idle_i     : in  std_logic;
00689        pipe_tx4_powerdown_i     : in  std_logic_vector(1 downto 0);
00690        pipe_rx4_char_is_k_i     : in  std_logic_vector(1 downto 0);
00691        pipe_rx4_data_i          : in  std_logic_vector(15 downto 0);
00692        pipe_rx4_valid_i         : in  std_logic;
00693        pipe_rx4_chanisaligned_i : in  std_logic;
00694        pipe_rx4_status_i        : in  std_logic_vector(2 downto 0);
00695        pipe_rx4_phy_status_i    : in  std_logic;
00696        pipe_rx4_elec_idle_i     : in  std_logic;
00697        pipe_rx4_polarity_o      : out std_logic;
00698        pipe_tx4_compliance_o    : out std_logic;
00699        pipe_tx4_char_is_k_o     : out std_logic_vector(1 downto 0);
00700        pipe_tx4_data_o          : out std_logic_vector(15 downto 0);
00701        pipe_tx4_elec_idle_o     : out std_logic;
00702        pipe_tx4_powerdown_o     : out std_logic_vector(1 downto 0);
00703        pipe_rx5_char_is_k_o     : out std_logic_vector(1 downto 0);
00704        pipe_rx5_data_o          : out std_logic_vector(15 downto 0);
00705        pipe_rx5_valid_o         : out std_logic;
00706        pipe_rx5_chanisaligned_o : out std_logic;
00707        pipe_rx5_status_o        : out std_logic_vector(2 downto 0);
00708        pipe_rx5_phy_status_o    : out std_logic;
00709        pipe_rx5_elec_idle_o     : out std_logic;
00710        pipe_rx5_polarity_i      : in  std_logic;
00711        pipe_tx5_compliance_i    : in  std_logic;
00712        pipe_tx5_char_is_k_i     : in  std_logic_vector(1 downto 0);
00713        pipe_tx5_data_i          : in  std_logic_vector(15 downto 0);
00714        pipe_tx5_elec_idle_i     : in  std_logic;
00715        pipe_tx5_powerdown_i     : in  std_logic_vector(1 downto 0);
00716        pipe_rx5_char_is_k_i     : in  std_logic_vector(1 downto 0);
00717        pipe_rx5_data_i          : in  std_logic_vector(15 downto 0);
00718        pipe_rx5_valid_i         : in  std_logic;
00719        pipe_rx5_chanisaligned_i : in  std_logic;
00720        pipe_rx5_status_i        : in  std_logic_vector(2 downto 0);
00721        pipe_rx5_phy_status_i    : in  std_logic;
00722        pipe_rx5_elec_idle_i     : in  std_logic;
00723        pipe_rx5_polarity_o      : out std_logic;
00724        pipe_tx5_compliance_o    : out std_logic;
00725        pipe_tx5_char_is_k_o     : out std_logic_vector(1 downto 0);
00726        pipe_tx5_data_o          : out std_logic_vector(15 downto 0);
00727        pipe_tx5_elec_idle_o     : out std_logic;
00728        pipe_tx5_powerdown_o     : out std_logic_vector(1 downto 0);
00729        pipe_rx6_char_is_k_o     : out std_logic_vector(1 downto 0);
00730        pipe_rx6_data_o          : out std_logic_vector(15 downto 0);
00731        pipe_rx6_valid_o         : out std_logic;
00732        pipe_rx6_chanisaligned_o : out std_logic;
00733        pipe_rx6_status_o        : out std_logic_vector(2 downto 0);
00734        pipe_rx6_phy_status_o    : out std_logic;
00735        pipe_rx6_elec_idle_o     : out std_logic;
00736        pipe_rx6_polarity_i      : in  std_logic;
00737        pipe_tx6_compliance_i    : in  std_logic;
00738        pipe_tx6_char_is_k_i     : in  std_logic_vector(1 downto 0);
00739        pipe_tx6_data_i          : in  std_logic_vector(15 downto 0);
00740        pipe_tx6_elec_idle_i     : in  std_logic;
00741        pipe_tx6_powerdown_i     : in  std_logic_vector(1 downto 0);
00742        pipe_rx6_char_is_k_i     : in  std_logic_vector(1 downto 0);
00743        pipe_rx6_data_i          : in  std_logic_vector(15 downto 0);
00744        pipe_rx6_valid_i         : in  std_logic;
00745        pipe_rx6_chanisaligned_i : in  std_logic;
00746        pipe_rx6_status_i        : in  std_logic_vector(2 downto 0);
00747        pipe_rx6_phy_status_i    : in  std_logic;
00748        pipe_rx6_elec_idle_i     : in  std_logic;
00749        pipe_rx6_polarity_o      : out std_logic;
00750        pipe_tx6_compliance_o    : out std_logic;
00751        pipe_tx6_char_is_k_o     : out std_logic_vector(1 downto 0);
00752        pipe_tx6_data_o          : out std_logic_vector(15 downto 0);
00753        pipe_tx6_elec_idle_o     : out std_logic;
00754        pipe_tx6_powerdown_o     : out std_logic_vector(1 downto 0);
00755        pipe_rx7_char_is_k_o     : out std_logic_vector(1 downto 0);
00756        pipe_rx7_data_o          : out std_logic_vector(15 downto 0);
00757        pipe_rx7_valid_o         : out std_logic;
00758        pipe_rx7_chanisaligned_o : out std_logic;
00759        pipe_rx7_status_o        : out std_logic_vector(2 downto 0);
00760        pipe_rx7_phy_status_o    : out std_logic;
00761        pipe_rx7_elec_idle_o     : out std_logic;
00762        pipe_rx7_polarity_i      : in  std_logic;
00763        pipe_tx7_compliance_i    : in  std_logic;
00764        pipe_tx7_char_is_k_i     : in  std_logic_vector(1 downto 0);
00765        pipe_tx7_data_i          : in  std_logic_vector(15 downto 0);
00766        pipe_tx7_elec_idle_i     : in  std_logic;
00767        pipe_tx7_powerdown_i     : in  std_logic_vector(1 downto 0);
00768        pipe_rx7_char_is_k_i     : in  std_logic_vector(1 downto 0);
00769        pipe_rx7_data_i          : in  std_logic_vector(15 downto 0);
00770        pipe_rx7_valid_i         : in  std_logic;
00771        pipe_rx7_chanisaligned_i : in  std_logic;
00772        pipe_rx7_status_i        : in  std_logic_vector(2 downto 0);
00773        pipe_rx7_phy_status_i    : in  std_logic;
00774        pipe_rx7_elec_idle_i     : in  std_logic;
00775        pipe_rx7_polarity_o      : out std_logic;
00776        pipe_tx7_compliance_o    : out std_logic;
00777        pipe_tx7_char_is_k_o     : out std_logic_vector(1 downto 0);
00778        pipe_tx7_data_o          : out std_logic_vector(15 downto 0);
00779        pipe_tx7_elec_idle_o     : out std_logic;
00780        pipe_tx7_powerdown_o     : out std_logic_vector(1 downto 0);
00781        pl_ltssm_state           : in  std_logic_vector(5 downto 0);
00782        pipe_clk                 : in  std_logic;
00783        rst_n                    : in  std_logic);
00784    end component;
00785 
00786    component pcie_gtx_v6
00787      generic (
00788        NO_OF_LANES             : integer;
00789        LINK_CAP_MAX_LINK_SPEED : bit_vector;
00790        REF_CLK_FREQ            : integer;
00791        PL_FAST_TRAIN           : boolean);
00792      port (
00793        pipe_tx_rcvr_det       : in  std_logic;
00794        pipe_tx_reset          : in  std_logic;
00795        pipe_tx_rate           : in  std_logic;
00796        pipe_tx_deemph         : in  std_logic;
00797        pipe_tx_margin         : in  std_logic_vector(2 downto 0);
00798        pipe_tx_swing          : in  std_logic;
00799        pipe_rx0_char_is_k     : out std_logic_vector(1 downto 0);
00800        pipe_rx0_data          : out std_logic_vector(15 downto 0);
00801        pipe_rx0_valid         : out std_logic;
00802        pipe_rx0_chanisaligned : out std_logic;
00803        pipe_rx0_status        : out std_logic_vector(2 downto 0);
00804        pipe_rx0_phy_status    : out std_logic;
00805        pipe_rx0_elec_idle     : out std_logic;
00806        pipe_rx0_polarity      : in  std_logic;
00807        pipe_tx0_compliance    : in  std_logic;
00808        pipe_tx0_char_is_k     : in  std_logic_vector(1 downto 0);
00809        pipe_tx0_data          : in  std_logic_vector(15 downto 0);
00810        pipe_tx0_elec_idle     : in  std_logic;
00811        pipe_tx0_powerdown     : in  std_logic_vector(1 downto 0);
00812        pipe_rx1_char_is_k     : out std_logic_vector(1 downto 0);
00813        pipe_rx1_data          : out std_logic_vector(15 downto 0);
00814        pipe_rx1_valid         : out std_logic;
00815        pipe_rx1_chanisaligned : out std_logic;
00816        pipe_rx1_status        : out std_logic_vector(2 downto 0);
00817        pipe_rx1_phy_status    : out std_logic;
00818        pipe_rx1_elec_idle     : out std_logic;
00819        pipe_rx1_polarity      : in  std_logic;
00820        pipe_tx1_compliance    : in  std_logic;
00821        pipe_tx1_char_is_k     : in  std_logic_vector(1 downto 0);
00822        pipe_tx1_data          : in  std_logic_vector(15 downto 0);
00823        pipe_tx1_elec_idle     : in  std_logic;
00824        pipe_tx1_powerdown     : in  std_logic_vector(1 downto 0);
00825        pipe_rx2_char_is_k     : out std_logic_vector(1 downto 0);
00826        pipe_rx2_data          : out std_logic_vector(15 downto 0);
00827        pipe_rx2_valid         : out std_logic;
00828        pipe_rx2_chanisaligned : out std_logic;
00829        pipe_rx2_status        : out std_logic_vector(2 downto 0);
00830        pipe_rx2_phy_status    : out std_logic;
00831        pipe_rx2_elec_idle     : out std_logic;
00832        pipe_rx2_polarity      : in  std_logic;
00833        pipe_tx2_compliance    : in  std_logic;
00834        pipe_tx2_char_is_k     : in  std_logic_vector(1 downto 0);
00835        pipe_tx2_data          : in  std_logic_vector(15 downto 0);
00836        pipe_tx2_elec_idle     : in  std_logic;
00837        pipe_tx2_powerdown     : in  std_logic_vector(1 downto 0);
00838        pipe_rx3_char_is_k     : out std_logic_vector(1 downto 0);
00839        pipe_rx3_data          : out std_logic_vector(15 downto 0);
00840        pipe_rx3_valid         : out std_logic;
00841        pipe_rx3_chanisaligned : out std_logic;
00842        pipe_rx3_status        : out std_logic_vector(2 downto 0);
00843        pipe_rx3_phy_status    : out std_logic;
00844        pipe_rx3_elec_idle     : out std_logic;
00845        pipe_rx3_polarity      : in  std_logic;
00846        pipe_tx3_compliance    : in  std_logic;
00847        pipe_tx3_char_is_k     : in  std_logic_vector(1 downto 0);
00848        pipe_tx3_data          : in  std_logic_vector(15 downto 0);
00849        pipe_tx3_elec_idle     : in  std_logic;
00850        pipe_tx3_powerdown     : in  std_logic_vector(1 downto 0);
00851        pipe_rx4_char_is_k     : out std_logic_vector(1 downto 0);
00852        pipe_rx4_data          : out std_logic_vector(15 downto 0);
00853        pipe_rx4_valid         : out std_logic;
00854        pipe_rx4_chanisaligned : out std_logic;
00855        pipe_rx4_status        : out std_logic_vector(2 downto 0);
00856        pipe_rx4_phy_status    : out std_logic;
00857        pipe_rx4_elec_idle     : out std_logic;
00858        pipe_rx4_polarity      : in  std_logic;
00859        pipe_tx4_compliance    : in  std_logic;
00860        pipe_tx4_char_is_k     : in  std_logic_vector(1 downto 0);
00861        pipe_tx4_data          : in  std_logic_vector(15 downto 0);
00862        pipe_tx4_elec_idle     : in  std_logic;
00863        pipe_tx4_powerdown     : in  std_logic_vector(1 downto 0);
00864        pipe_rx5_char_is_k     : out std_logic_vector(1 downto 0);
00865        pipe_rx5_data          : out std_logic_vector(15 downto 0);
00866        pipe_rx5_valid         : out std_logic;
00867        pipe_rx5_chanisaligned : out std_logic;
00868        pipe_rx5_status        : out std_logic_vector(2 downto 0);
00869        pipe_rx5_phy_status    : out std_logic;
00870        pipe_rx5_elec_idle     : out std_logic;
00871        pipe_rx5_polarity      : in  std_logic;
00872        pipe_tx5_compliance    : in  std_logic;
00873        pipe_tx5_char_is_k     : in  std_logic_vector(1 downto 0);
00874        pipe_tx5_data          : in  std_logic_vector(15 downto 0);
00875        pipe_tx5_elec_idle     : in  std_logic;
00876        pipe_tx5_powerdown     : in  std_logic_vector(1 downto 0);
00877        pipe_rx6_char_is_k     : out std_logic_vector(1 downto 0);
00878        pipe_rx6_data          : out std_logic_vector(15 downto 0);
00879        pipe_rx6_valid         : out std_logic;
00880        pipe_rx6_chanisaligned : out std_logic;
00881        pipe_rx6_status        : out std_logic_vector(2 downto 0);
00882        pipe_rx6_phy_status    : out std_logic;
00883        pipe_rx6_elec_idle     : out std_logic;
00884        pipe_rx6_polarity      : in  std_logic;
00885        pipe_tx6_compliance    : in  std_logic;
00886        pipe_tx6_char_is_k     : in  std_logic_vector(1 downto 0);
00887        pipe_tx6_data          : in  std_logic_vector(15 downto 0);
00888        pipe_tx6_elec_idle     : in  std_logic;
00889        pipe_tx6_powerdown     : in  std_logic_vector(1 downto 0);
00890        pipe_rx7_char_is_k     : out std_logic_vector(1 downto 0);
00891        pipe_rx7_data          : out std_logic_vector(15 downto 0);
00892        pipe_rx7_valid         : out std_logic;
00893        pipe_rx7_chanisaligned : out std_logic;
00894        pipe_rx7_status        : out std_logic_vector(2 downto 0);
00895        pipe_rx7_phy_status    : out std_logic;
00896        pipe_rx7_elec_idle     : out std_logic;
00897        pipe_rx7_polarity      : in  std_logic;
00898        pipe_tx7_compliance    : in  std_logic;
00899        pipe_tx7_char_is_k     : in  std_logic_vector(1 downto 0);
00900        pipe_tx7_data          : in  std_logic_vector(15 downto 0);
00901        pipe_tx7_elec_idle     : in  std_logic;
00902        pipe_tx7_powerdown     : in  std_logic_vector(1 downto 0);
00903        pci_exp_txn            : out std_logic_vector((NO_OF_LANES - 1) downto 0);
00904        pci_exp_txp            : out std_logic_vector((NO_OF_LANES - 1) downto 0);
00905        pci_exp_rxn            : in  std_logic_vector((NO_OF_LANES - 1) downto 0);
00906        pci_exp_rxp            : in  std_logic_vector((NO_OF_LANES - 1) downto 0);
00907        sys_clk                : in  std_logic;
00908        sys_rst_n              : in  std_logic;
00909        pipe_clk               : in  std_logic;
00910        drp_clk                : in  std_logic;
00911        clock_locked           : in  std_logic;
00912        gt_pll_lock            : out std_logic;
00913        pl_ltssm_state         : in  std_logic_vector(5 downto 0);
00914        phy_rdy_n              : out std_logic;
00915        TxOutClk               : out std_logic);
00916    end component;
00917 
00918    component pcie_bram_top_v6
00919      generic (
00920        DEV_CAP_MAX_PAYLOAD_SUPPORTED : integer;
00921        VC0_TX_LASTPACKET             : integer;
00922        TL_TX_RAM_RADDR_LATENCY       : integer;
00923        TL_TX_RAM_RDATA_LATENCY       : integer;
00924        TL_TX_RAM_WRITE_LATENCY       : integer;
00925        VC0_RX_LIMIT                  : bit_vector;
00926        TL_RX_RAM_RADDR_LATENCY       : integer;
00927        TL_RX_RAM_RDATA_LATENCY       : integer;
00928        TL_RX_RAM_WRITE_LATENCY       : integer);
00929      port (
00930        user_clk_i   : in  std_logic;
00931        reset_i      : in  std_logic;
00932        mim_tx_wen   : in  std_logic;
00933        mim_tx_waddr : in  std_logic_vector(12 downto 0);
00934        mim_tx_wdata : in  std_logic_vector(71 downto 0);
00935        mim_tx_ren   : in  std_logic;
00936        mim_tx_rce   : in  std_logic;
00937        mim_tx_raddr : in  std_logic_vector(12 downto 0);
00938        mim_tx_rdata : out std_logic_vector(71 downto 0);
00939        mim_rx_wen   : in  std_logic;
00940        mim_rx_waddr : in  std_logic_vector(12 downto 0);
00941        mim_rx_wdata : in  std_logic_vector(71 downto 0);
00942        mim_rx_ren   : in  std_logic;
00943        mim_rx_rce   : in  std_logic;
00944        mim_rx_raddr : in  std_logic_vector(12 downto 0);
00945        mim_rx_rdata : out std_logic_vector(71 downto 0));
00946    end component;
00947 
00948    component pcie_upconfig_fix_3451_v6
00949      generic (
00950        UPSTREAM_FACING         : boolean;
00951        PL_FAST_TRAIN           : boolean;
00952        LINK_CAP_MAX_LINK_WIDTH : bit_vector);
00953      port (
00954        pipe_clk                         : in  std_logic;
00955        pl_phy_lnkup_n                   : in  std_logic;
00956        pl_ltssm_state                   : in  std_logic_vector(5 downto 0);
00957        pl_sel_lnk_rate                  : in  std_logic;
00958        pl_directed_link_change          : in  std_logic_vector(1 downto 0);
00959        cfg_link_status_negotiated_width : in  std_logic_vector(3 downto 0);
00960        pipe_rx0_data                    : in std_logic_vector(15 downto 0);
00961        pipe_rx0_char_isk                : in std_logic_vector(1 downto 0);
00962        filter_pipe                      : out std_logic);
00963    end component;
00964    
00965    -- wire declarations
00966    
00967    signal LL2BADDLLPERRN                               : std_logic;
00968    signal LL2BADTLPERRN                                : std_logic;
00969    signal LL2PROTOCOLERRN                              : std_logic;
00970    signal LL2REPLAYROERRN                              : std_logic;
00971    signal LL2REPLAYTOERRN                              : std_logic;
00972    signal LL2SUSPENDOKN                                : std_logic;
00973    signal LL2TFCINIT1SEQN                              : std_logic;
00974    signal LL2TFCINIT2SEQN                              : std_logic;
00975    signal MIMRXRADDR                                   : std_logic_vector(12 downto 0);
00976    signal MIMRXRCE                                     : std_logic;
00977    signal MIMRXREN                                     : std_logic;
00978    signal MIMRXWADDR                                   : std_logic_vector(12 downto 0);
00979    signal MIMRXWDATA                                   : std_logic_vector(67 downto 0);
00980    signal MIMRXWDATA_tmp                               : std_logic_vector(71 downto 0);
00981    signal MIMRXWEN                                     : std_logic;
00982    signal MIMTXRADDR                                   : std_logic_vector(12 downto 0);
00983    signal MIMTXRCE                                     : std_logic;
00984    signal MIMTXREN                                     : std_logic;
00985    signal MIMTXWADDR                                   : std_logic_vector(12 downto 0);
00986    signal MIMTXWDATA                                   : std_logic_vector(68 downto 0);
00987    signal MIMTXWDATA_tmp                               : std_logic_vector(71 downto 0);
00988    signal MIMTXWEN                                     : std_logic;
00989    signal PIPERX0POLARITY                              : std_logic;
00990    signal PIPERX1POLARITY                              : std_logic;
00991    signal PIPERX2POLARITY                              : std_logic;
00992    signal PIPERX3POLARITY                              : std_logic;
00993    signal PIPERX4POLARITY                              : std_logic;
00994    signal PIPERX5POLARITY                              : std_logic;
00995    signal PIPERX6POLARITY                              : std_logic;
00996    signal PIPERX7POLARITY                              : std_logic;
00997    signal PIPETXDEEMPH                                 : std_logic;
00998    signal PIPETXMARGIN                                 : std_logic_vector(2 downto 0);
00999    signal PIPETXRATE                                   : std_logic;
01000    signal PIPETXRCVRDET                                : std_logic;
01001    signal PIPETXRESET                                  : std_logic;
01002    signal PIPETX0CHARISK                               : std_logic_vector(1 downto 0);
01003    signal PIPETX0COMPLIANCE                            : std_logic;
01004    signal PIPETX0DATA                                  : std_logic_vector(15 downto 0);
01005    signal PIPETX0ELECIDLE                              : std_logic;
01006    signal PIPETX0POWERDOWN                             : std_logic_vector(1 downto 0);
01007    signal PIPETX1CHARISK                               : std_logic_vector(1 downto 0);
01008    signal PIPETX1COMPLIANCE                            : std_logic;
01009    signal PIPETX1DATA                                  : std_logic_vector(15 downto 0);
01010    signal PIPETX1ELECIDLE                              : std_logic;
01011    signal PIPETX1POWERDOWN                             : std_logic_vector(1 downto 0);
01012    signal PIPETX2CHARISK                               : std_logic_vector(1 downto 0);
01013    signal PIPETX2COMPLIANCE                            : std_logic;
01014    signal PIPETX2DATA                                  : std_logic_vector(15 downto 0);
01015    signal PIPETX2ELECIDLE                              : std_logic;
01016    signal PIPETX2POWERDOWN                             : std_logic_vector(1 downto 0);
01017    signal PIPETX3CHARISK                               : std_logic_vector(1 downto 0);
01018    signal PIPETX3COMPLIANCE                            : std_logic;
01019    signal PIPETX3DATA                                  : std_logic_vector(15 downto 0);
01020    signal PIPETX3ELECIDLE                              : std_logic;
01021    signal PIPETX3POWERDOWN                             : std_logic_vector(1 downto 0);
01022    signal PIPETX4CHARISK                               : std_logic_vector(1 downto 0);
01023    signal PIPETX4COMPLIANCE                            : std_logic;
01024    signal PIPETX4DATA                                  : std_logic_vector(15 downto 0);
01025    signal PIPETX4ELECIDLE                              : std_logic;
01026    signal PIPETX4POWERDOWN                             : std_logic_vector(1 downto 0);
01027    signal PIPETX5CHARISK                               : std_logic_vector(1 downto 0);
01028    signal PIPETX5COMPLIANCE                            : std_logic;
01029    signal PIPETX5DATA                                  : std_logic_vector(15 downto 0);
01030    signal PIPETX5ELECIDLE                              : std_logic;
01031    signal PIPETX5POWERDOWN                             : std_logic_vector(1 downto 0);
01032    signal PIPETX6CHARISK                               : std_logic_vector(1 downto 0);
01033    signal PIPETX6COMPLIANCE                            : std_logic;
01034    signal PIPETX6DATA                                  : std_logic_vector(15 downto 0);
01035    signal PIPETX6ELECIDLE                              : std_logic;
01036    signal PIPETX6POWERDOWN                             : std_logic_vector(1 downto 0);
01037    signal PIPETX7CHARISK                               : std_logic_vector(1 downto 0);
01038    signal PIPETX7COMPLIANCE                            : std_logic;
01039    signal PIPETX7DATA                                  : std_logic_vector(15 downto 0);
01040    signal PIPETX7ELECIDLE                              : std_logic;
01041    signal PIPETX7POWERDOWN                             : std_logic_vector(1 downto 0);
01042    signal PL2LINKUPN                                   : std_logic;
01043    signal PL2RECEIVERERRN                              : std_logic;
01044    signal PL2RECOVERYN                                 : std_logic;
01045    signal PL2RXELECIDLE                                : std_logic;
01046    signal PL2SUSPENDOK                                 : std_logic;
01047    signal TL2ASPMSUSPENDCREDITCHECKOKN                 : std_logic;
01048    signal TL2ASPMSUSPENDREQN                           : std_logic;
01049    signal TL2PPMSUSPENDOKN                             : std_logic;
01050    signal LL2SENDASREQL1N                              : std_logic;
01051    signal LL2SENDENTERL1N                              : std_logic;
01052    signal LL2SENDENTERL23N                             : std_logic;
01053    signal LL2SUSPENDNOWN                               : std_logic;
01054    signal LL2TLPRCVN                                   : std_logic;
01055    signal MIMRXRDATA                                   : std_logic_vector(71 downto 0);
01056    signal MIMTXRDATA                                   : std_logic_vector(71 downto 0);
01057    signal PL2DIRECTEDLSTATE                            : std_logic_vector(4 downto 0);
01058    signal TL2ASPMSUSPENDCREDITCHECKN                   : std_logic;
01059    signal TL2PPMSUSPENDREQN                            : std_logic;
01060    signal PIPERX0CHANISALIGNED                         : std_logic;
01061    signal PIPERX0CHARISK                               : std_logic_vector(1 downto 0);
01062    signal PIPERX0DATA                                  : std_logic_vector(15 downto 0);
01063    signal PIPERX0ELECIDLE                              : std_logic;
01064    signal PIPERX0PHYSTATUS                             : std_logic;
01065    signal PIPERX0STATUS                                : std_logic_vector(2 downto 0);
01066    signal PIPERX0VALID                                 : std_logic;
01067    signal PIPERX1CHANISALIGNED                         : std_logic;
01068    signal PIPERX1CHARISK                               : std_logic_vector(1 downto 0);
01069    signal PIPERX1DATA                                  : std_logic_vector(15 downto 0);
01070    signal PIPERX1ELECIDLE                              : std_logic;
01071    signal PIPERX1PHYSTATUS                             : std_logic;
01072    signal PIPERX1STATUS                                : std_logic_vector(2 downto 0);
01073    signal PIPERX1VALID                                 : std_logic;
01074    signal PIPERX2CHANISALIGNED                         : std_logic;
01075    signal PIPERX2CHARISK                               : std_logic_vector(1 downto 0);
01076    signal PIPERX2DATA                                  : std_logic_vector(15 downto 0);
01077    signal PIPERX2ELECIDLE                              : std_logic;
01078    signal PIPERX2PHYSTATUS                             : std_logic;
01079    signal PIPERX2STATUS                                : std_logic_vector(2 downto 0);
01080    signal PIPERX2VALID                                 : std_logic;
01081    signal PIPERX3CHANISALIGNED                         : std_logic;
01082    signal PIPERX3CHARISK                               : std_logic_vector(1 downto 0);
01083    signal PIPERX3DATA                                  : std_logic_vector(15 downto 0);
01084    signal PIPERX3ELECIDLE                              : std_logic;
01085    signal PIPERX3PHYSTATUS                             : std_logic;
01086    signal PIPERX3STATUS                                : std_logic_vector(2 downto 0);
01087    signal PIPERX3VALID                                 : std_logic;
01088    signal PIPERX4CHANISALIGNED                         : std_logic;
01089    signal PIPERX4CHARISK                               : std_logic_vector(1 downto 0);
01090    signal PIPERX4DATA                                  : std_logic_vector(15 downto 0);
01091    signal PIPERX4ELECIDLE                              : std_logic;
01092    signal PIPERX4PHYSTATUS                             : std_logic;
01093    signal PIPERX4STATUS                                : std_logic_vector(2 downto 0);
01094    signal PIPERX4VALID                                 : std_logic;
01095    signal PIPERX5CHANISALIGNED                         : std_logic;
01096    signal PIPERX5CHARISK                               : std_logic_vector(1 downto 0);
01097    signal PIPERX5DATA                                  : std_logic_vector(15 downto 0);
01098    signal PIPERX5ELECIDLE                              : std_logic;
01099    signal PIPERX5PHYSTATUS                             : std_logic;
01100    signal PIPERX5STATUS                                : std_logic_vector(2 downto 0);
01101    signal PIPERX5VALID                                 : std_logic;
01102    signal PIPERX6CHANISALIGNED                         : std_logic;
01103    signal PIPERX6CHARISK                               : std_logic_vector(1 downto 0);
01104    signal PIPERX6DATA                                  : std_logic_vector(15 downto 0);
01105    signal PIPERX6ELECIDLE                              : std_logic;
01106    signal PIPERX6PHYSTATUS                             : std_logic;
01107    signal PIPERX6STATUS                                : std_logic_vector(2 downto 0);
01108    signal PIPERX6VALID                                 : std_logic;
01109    signal PIPERX7CHANISALIGNED                         : std_logic;
01110    signal PIPERX7CHARISK                               : std_logic_vector(1 downto 0);
01111    signal PIPERX7DATA                                  : std_logic_vector(15 downto 0);
01112    signal PIPERX7ELECIDLE                              : std_logic;
01113    signal PIPERX7PHYSTATUS                             : std_logic;
01114    signal PIPERX7STATUS                                : std_logic_vector(2 downto 0);
01115    signal PIPERX7VALID                                 : std_logic;
01116    
01117    signal PIPERX0POLARITYGT                            : std_logic;
01118    signal PIPERX1POLARITYGT                            : std_logic;
01119    signal PIPERX2POLARITYGT                            : std_logic;
01120    signal PIPERX3POLARITYGT                            : std_logic;
01121    signal PIPERX4POLARITYGT                            : std_logic;
01122    signal PIPERX5POLARITYGT                            : std_logic;
01123    signal PIPERX6POLARITYGT                            : std_logic;
01124    signal PIPERX7POLARITYGT                            : std_logic;
01125    signal PIPETXDEEMPHGT                               : std_logic;
01126    signal PIPETXMARGINGT                               : std_logic_vector(2 downto 0);
01127    signal PIPETXRATEGT                                 : std_logic;
01128    signal PIPETXRCVRDETGT                              : std_logic;
01129    signal PIPETX0CHARISKGT                             : std_logic_vector(1 downto 0);
01130    signal PIPETX0COMPLIANCEGT                          : std_logic;
01131    signal PIPETX0DATAGT                                : std_logic_vector(15 downto 0);
01132    signal PIPETX0ELECIDLEGT                            : std_logic;
01133    signal PIPETX0POWERDOWNGT                           : std_logic_vector(1 downto 0);
01134    signal PIPETX1CHARISKGT                             : std_logic_vector(1 downto 0);
01135    signal PIPETX1COMPLIANCEGT                          : std_logic;
01136    signal PIPETX1DATAGT                                : std_logic_vector(15 downto 0);
01137    signal PIPETX1ELECIDLEGT                            : std_logic;
01138    signal PIPETX1POWERDOWNGT                           : std_logic_vector(1 downto 0);
01139    signal PIPETX2CHARISKGT                             : std_logic_vector(1 downto 0);
01140    signal PIPETX2COMPLIANCEGT                          : std_logic;
01141    signal PIPETX2DATAGT                                : std_logic_vector(15 downto 0);
01142    signal PIPETX2ELECIDLEGT                            : std_logic;
01143    signal PIPETX2POWERDOWNGT                           : std_logic_vector(1 downto 0);
01144    signal PIPETX3CHARISKGT                             : std_logic_vector(1 downto 0);
01145    signal PIPETX3COMPLIANCEGT                          : std_logic;
01146    signal PIPETX3DATAGT                                : std_logic_vector(15 downto 0);
01147    signal PIPETX3ELECIDLEGT                            : std_logic;
01148    signal PIPETX3POWERDOWNGT                           : std_logic_vector(1 downto 0);
01149    signal PIPETX4CHARISKGT                             : std_logic_vector(1 downto 0);
01150    signal PIPETX4COMPLIANCEGT                          : std_logic;
01151    signal PIPETX4DATAGT                                : std_logic_vector(15 downto 0);
01152    signal PIPETX4ELECIDLEGT                            : std_logic;
01153    signal PIPETX4POWERDOWNGT                           : std_logic_vector(1 downto 0);
01154    signal PIPETX5CHARISKGT                             : std_logic_vector(1 downto 0);
01155    signal PIPETX5COMPLIANCEGT                          : std_logic;
01156    signal PIPETX5DATAGT                                : std_logic_vector(15 downto 0);
01157    signal PIPETX5ELECIDLEGT                            : std_logic;
01158    signal PIPETX5POWERDOWNGT                           : std_logic_vector(1 downto 0);
01159    signal PIPETX6CHARISKGT                             : std_logic_vector(1 downto 0);
01160    signal PIPETX6COMPLIANCEGT                          : std_logic;
01161    signal PIPETX6DATAGT                                : std_logic_vector(15 downto 0);
01162    signal PIPETX6ELECIDLEGT                            : std_logic;
01163    signal PIPETX6POWERDOWNGT                           : std_logic_vector(1 downto 0);
01164    signal PIPETX7CHARISKGT                             : std_logic_vector(1 downto 0);
01165    signal PIPETX7COMPLIANCEGT                          : std_logic;
01166    signal PIPETX7DATAGT                                : std_logic_vector(15 downto 0);
01167    signal PIPETX7ELECIDLEGT                            : std_logic;
01168    signal PIPETX7POWERDOWNGT                           : std_logic_vector(1 downto 0);
01169    
01170    signal PIPERX0CHANISALIGNEDGT                       : std_logic;
01171    signal PIPERX0CHARISKGT                             : std_logic_vector(1 downto 0);
01172    signal PIPERX0DATAGT                                : std_logic_vector(15 downto 0);
01173    signal PIPERX0ELECIDLEGT                            : std_logic;
01174    signal PIPERX0PHYSTATUSGT                           : std_logic;
01175    signal PIPERX0STATUSGT                              : std_logic_vector(2 downto 0);
01176    signal PIPERX0VALIDGT                               : std_logic;
01177    signal PIPERX1CHANISALIGNEDGT                       : std_logic;
01178    signal PIPERX1CHARISKGT                             : std_logic_vector(1 downto 0);
01179    signal PIPERX1DATAGT                                : std_logic_vector(15 downto 0);
01180    signal PIPERX1ELECIDLEGT                            : std_logic;
01181    signal PIPERX1PHYSTATUSGT                           : std_logic;
01182    signal PIPERX1STATUSGT                              : std_logic_vector(2 downto 0);
01183    signal PIPERX1VALIDGT                               : std_logic;
01184    signal PIPERX2CHANISALIGNEDGT                       : std_logic;
01185    signal PIPERX2CHARISKGT                             : std_logic_vector(1 downto 0);
01186    signal PIPERX2DATAGT                                : std_logic_vector(15 downto 0);
01187    signal PIPERX2ELECIDLEGT                            : std_logic;
01188    signal PIPERX2PHYSTATUSGT                           : std_logic;
01189    signal PIPERX2STATUSGT                              : std_logic_vector(2 downto 0);
01190    signal PIPERX2VALIDGT                               : std_logic;
01191    signal PIPERX3CHANISALIGNEDGT                       : std_logic;
01192    signal PIPERX3CHARISKGT                             : std_logic_vector(1 downto 0);
01193    signal PIPERX3DATAGT                                : std_logic_vector(15 downto 0);
01194    signal PIPERX3ELECIDLEGT                            : std_logic;
01195    signal PIPERX3PHYSTATUSGT                           : std_logic;
01196    signal PIPERX3STATUSGT                              : std_logic_vector(2 downto 0);
01197    signal PIPERX3VALIDGT                               : std_logic;
01198    signal PIPERX4CHANISALIGNEDGT                       : std_logic;
01199    signal PIPERX4CHARISKGT                             : std_logic_vector(1 downto 0);
01200    signal PIPERX4DATAGT                                : std_logic_vector(15 downto 0);
01201    signal PIPERX4ELECIDLEGT                            : std_logic;
01202    signal PIPERX4PHYSTATUSGT                           : std_logic;
01203    signal PIPERX4STATUSGT                              : std_logic_vector(2 downto 0);
01204    signal PIPERX4VALIDGT                               : std_logic;
01205    signal PIPERX5CHANISALIGNEDGT                       : std_logic;
01206    signal PIPERX5CHARISKGT                             : std_logic_vector(1 downto 0);
01207    signal PIPERX5DATAGT                                : std_logic_vector(15 downto 0);
01208    signal PIPERX5ELECIDLEGT                            : std_logic;
01209    signal PIPERX5PHYSTATUSGT                           : std_logic;
01210    signal PIPERX5STATUSGT                              : std_logic_vector(2 downto 0);
01211    signal PIPERX5VALIDGT                               : std_logic;
01212    signal PIPERX6CHANISALIGNEDGT                       : std_logic;
01213    signal PIPERX6CHARISKGT                             : std_logic_vector(1 downto 0);
01214    signal PIPERX6DATAGT                                : std_logic_vector(15 downto 0);
01215    signal PIPERX6ELECIDLEGT                            : std_logic;
01216    signal PIPERX6PHYSTATUSGT                           : std_logic;
01217    signal PIPERX6STATUSGT                              : std_logic_vector(2 downto 0);
01218    signal PIPERX6VALIDGT                               : std_logic;
01219    signal PIPERX7CHANISALIGNEDGT                       : std_logic;
01220    signal PIPERX7CHARISKGT                             : std_logic_vector(1 downto 0);
01221    signal PIPERX7DATAGT                                : std_logic_vector(15 downto 0);
01222    signal PIPERX7ELECIDLEGT                            : std_logic;
01223    signal PIPERX7PHYSTATUSGT                           : std_logic;
01224    signal PIPERX7STATUSGT                              : std_logic_vector(2 downto 0);
01225    signal PIPERX7VALIDGT                               : std_logic;
01226    
01227    signal filter_pipe_upconfig_fix_3451                : std_logic;
01228    
01229    -- Declare intermediate signals for referenced outputs
01230    signal PCIEXPTXN_v6pcie100                          : std_logic_vector((LINK_CAP_MAX_LINK_WIDTH_int - 1) downto 0);
01231    signal PCIEXPTXP_v6pcie101                          : std_logic_vector((LINK_CAP_MAX_LINK_WIDTH_int - 1) downto 0);
01232    signal TRNLNKUPN_v6pcie123                          : std_logic;
01233    signal PHYRDYN_v6pcie102                            : std_logic;
01234    signal USERRSTN_v6pcie139                           : std_logic;
01235    signal RECEIVEDFUNCLVLRSTN_v6pcie116                : std_logic;
01236    signal LNKCLKEN_v6pcie97                            : std_logic;
01237    signal TRNRBARHITN_v6pcie124                        : std_logic_vector(6 downto 0);
01238    signal TRNRD_v6pcie125                              : std_logic_vector(63 downto 0);
01239    signal TRNRECRCERRN_v6pcie126                       : std_logic;
01240    signal TRNREOFN_v6pcie127                           : std_logic;
01241    signal TRNRERRFWDN_v6pcie128                        : std_logic;
01242    signal TRNRREMN_v6pcie129                           : std_logic;
01243    signal TRNRSOFN_v6pcie130                           : std_logic;
01244    signal TRNRSRCDSCN_v6pcie131                        : std_logic;
01245    signal TRNRSRCRDYN_v6pcie132                        : std_logic;
01246    signal TRNTBUFAV_v6pcie133                          : std_logic_vector(5 downto 0);
01247    signal TRNTCFGREQN_v6pcie134                        : std_logic;
01248    signal TRNTDLLPDSTRDYN_v6pcie135                    : std_logic;
01249    signal TRNTDSTRDYN_v6pcie136                        : std_logic;
01250    signal TRNTERRDROPN_v6pcie137                       : std_logic;
01251    signal TRNFCCPLD_v6pcie117                          : std_logic_vector(11 downto 0);
01252    signal TRNFCCPLH_v6pcie118                          : std_logic_vector(7 downto 0);
01253    signal TRNFCNPD_v6pcie119                           : std_logic_vector(11 downto 0);
01254    signal TRNFCNPH_v6pcie120                           : std_logic_vector(7 downto 0);
01255    signal TRNFCPD_v6pcie121                            : std_logic_vector(11 downto 0);
01256    signal TRNFCPH_v6pcie122                            : std_logic_vector(7 downto 0);
01257    signal CFGAERECRCCHECKEN_v6pcie0                    : std_logic;
01258    signal CFGAERECRCGENEN_v6pcie1                      : std_logic;
01259    signal CFGCOMMANDBUSMASTERENABLE_v6pcie2            : std_logic;
01260    signal CFGCOMMANDINTERRUPTDISABLE_v6pcie3           : std_logic;
01261    signal CFGCOMMANDIOENABLE_v6pcie4                   : std_logic;
01262    signal CFGCOMMANDMEMENABLE_v6pcie5                  : std_logic;
01263    signal CFGCOMMANDSERREN_v6pcie6                     : std_logic;
01264    signal CFGDEVCONTROLAUXPOWEREN_v6pcie9              : std_logic;
01265    signal CFGDEVCONTROLCORRERRREPORTINGEN_v6pcie10     : std_logic;
01266    signal CFGDEVCONTROLENABLERO_v6pcie11               : std_logic;
01267    signal CFGDEVCONTROLEXTTAGEN_v6pcie12               : std_logic;
01268    signal CFGDEVCONTROLFATALERRREPORTINGEN_v6pcie13    : std_logic;
01269    signal CFGDEVCONTROLMAXPAYLOAD_v6pcie14             : std_logic_vector(2 downto 0);
01270    signal CFGDEVCONTROLMAXREADREQ_v6pcie15             : std_logic_vector(2 downto 0);
01271    signal CFGDEVCONTROLNONFATALREPORTINGEN_v6pcie16    : std_logic;
01272    signal CFGDEVCONTROLNOSNOOPEN_v6pcie17              : std_logic;
01273    signal CFGDEVCONTROLPHANTOMEN_v6pcie18              : std_logic;
01274    signal CFGDEVCONTROLURERRREPORTINGEN_v6pcie19       : std_logic;
01275    signal CFGDEVCONTROL2CPLTIMEOUTDIS_v6pcie7          : std_logic;
01276    signal CFGDEVCONTROL2CPLTIMEOUTVAL_v6pcie8          : std_logic_vector(3 downto 0);
01277    signal CFGDEVSTATUSCORRERRDETECTED_v6pcie20         : std_logic;
01278    signal CFGDEVSTATUSFATALERRDETECTED_v6pcie21        : std_logic;
01279    signal CFGDEVSTATUSNONFATALERRDETECTED_v6pcie22     : std_logic;
01280    signal CFGDEVSTATUSURDETECTED_v6pcie23              : std_logic;
01281    signal CFGDO_v6pcie24                               : std_logic_vector(31 downto 0);
01282    signal CFGERRAERHEADERLOGSETN_v6pcie25              : std_logic;
01283    signal CFGERRCPLRDYN_v6pcie26                       : std_logic;
01284    signal CFGINTERRUPTDO_v6pcie27                      : std_logic_vector(7 downto 0);
01285    signal CFGINTERRUPTMMENABLE_v6pcie28                : std_logic_vector(2 downto 0);
01286    signal CFGINTERRUPTMSIENABLE_v6pcie29               : std_logic;
01287    signal CFGINTERRUPTMSIXENABLE_v6pcie30              : std_logic;
01288    signal CFGINTERRUPTMSIXFM_v6pcie31                  : std_logic;
01289    signal CFGINTERRUPTRDYN_v6pcie32                    : std_logic;
01290    signal CFGLINKCONTROLRCB_v6pcie41                   : std_logic;
01291    signal CFGLINKCONTROLASPMCONTROL_v6pcie33           : std_logic_vector(1 downto 0);
01292    signal CFGLINKCONTROLAUTOBANDWIDTHINTEN_v6pcie34    : std_logic;
01293    signal CFGLINKCONTROLBANDWIDTHINTEN_v6pcie35        : std_logic;
01294    signal CFGLINKCONTROLCLOCKPMEN_v6pcie36             : std_logic;
01295    signal CFGLINKCONTROLCOMMONCLOCK_v6pcie37           : std_logic;
01296    signal CFGLINKCONTROLEXTENDEDSYNC_v6pcie38          : std_logic;
01297    signal CFGLINKCONTROLHWAUTOWIDTHDIS_v6pcie39        : std_logic;
01298    signal CFGLINKCONTROLLINKDISABLE_v6pcie40           : std_logic;
01299    signal CFGLINKCONTROLRETRAINLINK_v6pcie42           : std_logic;
01300    signal CFGLINKSTATUSAUTOBANDWIDTHSTATUS_v6pcie43    : std_logic;
01301    signal CFGLINKSTATUSBANDWITHSTATUS_v6pcie44         : std_logic;
01302    signal CFGLINKSTATUSCURRENTSPEED_v6pcie45           : std_logic_vector(1 downto 0);
01303    signal CFGLINKSTATUSDLLACTIVE_v6pcie46              : std_logic;
01304    signal CFGLINKSTATUSLINKTRAINING_v6pcie47           : std_logic;
01305    signal CFGLINKSTATUSNEGOTIATEDWIDTH_v6pcie48        : std_logic_vector(3 downto 0);
01306    signal CFGMSGDATA_v6pcie49                          : std_logic_vector(15 downto 0);
01307    signal CFGMSGRECEIVED_v6pcie50                      : std_logic;
01308    signal CFGMSGRECEIVEDASSERTINTA_v6pcie51            : std_logic;
01309    signal CFGMSGRECEIVEDASSERTINTB_v6pcie52            : std_logic;
01310    signal CFGMSGRECEIVEDASSERTINTC_v6pcie53            : std_logic;
01311    signal CFGMSGRECEIVEDASSERTINTD_v6pcie54            : std_logic;
01312    signal CFGMSGRECEIVEDDEASSERTINTA_v6pcie55          : std_logic;
01313    signal CFGMSGRECEIVEDDEASSERTINTB_v6pcie56          : std_logic;
01314    signal CFGMSGRECEIVEDDEASSERTINTC_v6pcie57          : std_logic;
01315    signal CFGMSGRECEIVEDDEASSERTINTD_v6pcie58          : std_logic;
01316    signal CFGMSGRECEIVEDERRCOR_v6pcie59                : std_logic;
01317    signal CFGMSGRECEIVEDERRFATAL_v6pcie60              : std_logic;
01318    signal CFGMSGRECEIVEDERRNONFATAL_v6pcie61           : std_logic;
01319    signal CFGMSGRECEIVEDPMASNAK_v6pcie62               : std_logic;
01320    signal CFGMSGRECEIVEDPMETO_v6pcie63                 : std_logic;
01321    signal CFGMSGRECEIVEDPMETOACK_v6pcie64              : std_logic;
01322    signal CFGMSGRECEIVEDPMPME_v6pcie65                 : std_logic;
01323    signal CFGMSGRECEIVEDSETSLOTPOWERLIMIT_v6pcie66     : std_logic;
01324    signal CFGMSGRECEIVEDUNLOCK_v6pcie67                : std_logic;
01325    signal CFGPCIELINKSTATE_v6pcie68                    : std_logic_vector(2 downto 0);
01326    signal CFGPMCSRPMEEN_v6pcie69                       : std_logic;
01327    signal CFGPMCSRPMESTATUS_v6pcie70                   : std_logic;
01328    signal CFGPMCSRPOWERSTATE_v6pcie71                  : std_logic_vector(1 downto 0);
01329    signal CFGPMRCVASREQL1N_v6pcie72                    : std_logic;
01330    signal CFGPMRCVENTERL1N_v6pcie73                    : std_logic;
01331    signal CFGPMRCVENTERL23N_v6pcie74                   : std_logic;
01332    signal CFGPMRCVREQACKN_v6pcie75                     : std_logic;
01333    signal CFGRDWRDONEN_v6pcie76                        : std_logic;
01334    signal CFGSLOTCONTROLELECTROMECHILCTLPULSE_v6pcie77 : std_logic;
01335    signal CFGTRANSACTION_v6pcie78                      : std_logic;
01336    signal CFGTRANSACTIONADDR_v6pcie79                  : std_logic_vector(6 downto 0);
01337    signal CFGTRANSACTIONTYPE_v6pcie80                  : std_logic;
01338    signal CFGVCTCVCMAP_v6pcie81                        : std_logic_vector(6 downto 0);
01339    signal PLINITIALLINKWIDTH_v6pcie104                 : std_logic_vector(2 downto 0);
01340    signal PLLANEREVERSALMODE_v6pcie105                 : std_logic_vector(1 downto 0);
01341    signal PLLINKGEN2CAP_v6pcie106                      : std_logic;
01342    signal PLLINKPARTNERGEN2SUPPORTED_v6pcie107         : std_logic;
01343    signal PLLINKUPCFGCAP_v6pcie108                     : std_logic;
01344    signal PLLTSSMSTATE_v6pcie109                       : std_logic_vector(5 downto 0);
01345    signal PLPHYLNKUPN_v6pcie110                        : std_logic;
01346    signal PLRECEIVEDHOTRST_v6pcie111                   : std_logic;
01347    signal PLRXPMSTATE_v6pcie112                        : std_logic_vector(1 downto 0);
01348    signal PLSELLNKRATE_v6pcie113                       : std_logic;
01349    signal PLSELLNKWIDTH_v6pcie114                      : std_logic_vector(1 downto 0);
01350    signal PLTXPMSTATE_v6pcie115                        : std_logic_vector(2 downto 0);
01351    signal DBGSCLRA_v6pcie82                            : std_logic;
01352    signal DBGSCLRB_v6pcie83                            : std_logic;
01353    signal DBGSCLRC_v6pcie84                            : std_logic;
01354    signal DBGSCLRD_v6pcie85                            : std_logic;
01355    signal DBGSCLRE_v6pcie86                            : std_logic;
01356    signal DBGSCLRF_v6pcie87                            : std_logic;
01357    signal DBGSCLRG_v6pcie88                            : std_logic;
01358    signal DBGSCLRH_v6pcie89                            : std_logic;
01359    signal DBGSCLRI_v6pcie90                            : std_logic;
01360    signal DBGSCLRJ_v6pcie91                            : std_logic;
01361    signal DBGSCLRK_v6pcie92                            : std_logic;
01362    signal DBGVECA_v6pcie93                             : std_logic_vector(63 downto 0);
01363    signal DBGVECB_v6pcie94                             : std_logic_vector(63 downto 0);
01364    signal DBGVECC_v6pcie95                             : std_logic_vector(11 downto 0);
01365    signal PLDBGVEC_v6pcie103                           : std_logic_vector(11 downto 0);
01366    signal PCIEDRPDO_v6pcie98                           : std_logic_vector(15 downto 0);
01367    signal PCIEDRPDRDY_v6pcie99                         : std_logic;
01368    signal GTPLLLOCK_v6pcie96                           : std_logic;
01369    signal TxOutClk_v6pcie138                           : std_logic;
01370 
01371    signal PIPERX0CHARISK_v6pcie                        : std_logic_vector(1 downto 0);
01372    signal PIPERX1CHARISK_v6pcie                        : std_logic_vector(1 downto 0);
01373    signal PIPERX2CHARISK_v6pcie                        : std_logic_vector(1 downto 0);
01374    signal PIPERX3CHARISK_v6pcie                        : std_logic_vector(1 downto 0);
01375    signal PIPERX4CHARISK_v6pcie                        : std_logic_vector(1 downto 0);
01376    signal PIPERX5CHARISK_v6pcie                        : std_logic_vector(1 downto 0);
01377    signal PIPERX6CHARISK_v6pcie                        : std_logic_vector(1 downto 0);
01378    signal PIPERX7CHARISK_v6pcie                        : std_logic_vector(1 downto 0);
01379 
01380 begin
01381    -- Drive referenced outputs
01382    PCIEXPTXN <= PCIEXPTXN_v6pcie100;
01383    PCIEXPTXP <= PCIEXPTXP_v6pcie101;
01384    TRNLNKUPN <= TRNLNKUPN_v6pcie123;
01385    PHYRDYN <= PHYRDYN_v6pcie102;
01386    USERRSTN <= USERRSTN_v6pcie139;
01387    RECEIVEDFUNCLVLRSTN <= RECEIVEDFUNCLVLRSTN_v6pcie116;
01388    LNKCLKEN <= LNKCLKEN_v6pcie97;
01389    TRNRBARHITN <= TRNRBARHITN_v6pcie124;
01390    TRNRD <= TRNRD_v6pcie125;
01391    TRNRECRCERRN <= TRNRECRCERRN_v6pcie126;
01392    TRNREOFN <= TRNREOFN_v6pcie127;
01393    TRNRERRFWDN <= TRNRERRFWDN_v6pcie128;
01394    TRNRREMN <= TRNRREMN_v6pcie129;
01395    TRNRSOFN <= TRNRSOFN_v6pcie130;
01396    TRNRSRCDSCN <= TRNRSRCDSCN_v6pcie131;
01397    TRNRSRCRDYN <= TRNRSRCRDYN_v6pcie132;
01398    TRNTBUFAV <= TRNTBUFAV_v6pcie133;
01399    TRNTCFGREQN <= TRNTCFGREQN_v6pcie134;
01400    TRNTDLLPDSTRDYN <= TRNTDLLPDSTRDYN_v6pcie135;
01401    TRNTDSTRDYN <= TRNTDSTRDYN_v6pcie136;
01402    TRNTERRDROPN <= TRNTERRDROPN_v6pcie137;
01403    TRNFCCPLD <= TRNFCCPLD_v6pcie117;
01404    TRNFCCPLH <= TRNFCCPLH_v6pcie118;
01405    TRNFCNPD <= TRNFCNPD_v6pcie119;
01406    TRNFCNPH <= TRNFCNPH_v6pcie120;
01407    TRNFCPD <= TRNFCPD_v6pcie121;
01408    TRNFCPH <= TRNFCPH_v6pcie122;
01409    CFGAERECRCCHECKEN <= CFGAERECRCCHECKEN_v6pcie0;
01410    CFGAERECRCGENEN <= CFGAERECRCGENEN_v6pcie1;
01411    CFGCOMMANDBUSMASTERENABLE <= CFGCOMMANDBUSMASTERENABLE_v6pcie2;
01412    CFGCOMMANDINTERRUPTDISABLE <= CFGCOMMANDINTERRUPTDISABLE_v6pcie3;
01413    CFGCOMMANDIOENABLE <= CFGCOMMANDIOENABLE_v6pcie4;
01414    CFGCOMMANDMEMENABLE <= CFGCOMMANDMEMENABLE_v6pcie5;
01415    CFGCOMMANDSERREN <= CFGCOMMANDSERREN_v6pcie6;
01416    CFGDEVCONTROLAUXPOWEREN <= CFGDEVCONTROLAUXPOWEREN_v6pcie9;
01417    CFGDEVCONTROLCORRERRREPORTINGEN <= CFGDEVCONTROLCORRERRREPORTINGEN_v6pcie10;
01418    CFGDEVCONTROLENABLERO <= CFGDEVCONTROLENABLERO_v6pcie11;
01419    CFGDEVCONTROLEXTTAGEN <= CFGDEVCONTROLEXTTAGEN_v6pcie12;
01420    CFGDEVCONTROLFATALERRREPORTINGEN <= CFGDEVCONTROLFATALERRREPORTINGEN_v6pcie13;
01421    CFGDEVCONTROLMAXPAYLOAD <= CFGDEVCONTROLMAXPAYLOAD_v6pcie14;
01422    CFGDEVCONTROLMAXREADREQ <= CFGDEVCONTROLMAXREADREQ_v6pcie15;
01423    CFGDEVCONTROLNONFATALREPORTINGEN <= CFGDEVCONTROLNONFATALREPORTINGEN_v6pcie16;
01424    CFGDEVCONTROLNOSNOOPEN <= CFGDEVCONTROLNOSNOOPEN_v6pcie17;
01425    CFGDEVCONTROLPHANTOMEN <= CFGDEVCONTROLPHANTOMEN_v6pcie18;
01426    CFGDEVCONTROLURERRREPORTINGEN <= CFGDEVCONTROLURERRREPORTINGEN_v6pcie19;
01427    CFGDEVCONTROL2CPLTIMEOUTDIS <= CFGDEVCONTROL2CPLTIMEOUTDIS_v6pcie7;
01428    CFGDEVCONTROL2CPLTIMEOUTVAL <= CFGDEVCONTROL2CPLTIMEOUTVAL_v6pcie8;
01429    CFGDEVSTATUSCORRERRDETECTED <= CFGDEVSTATUSCORRERRDETECTED_v6pcie20;
01430    CFGDEVSTATUSFATALERRDETECTED <= CFGDEVSTATUSFATALERRDETECTED_v6pcie21;
01431    CFGDEVSTATUSNONFATALERRDETECTED <= CFGDEVSTATUSNONFATALERRDETECTED_v6pcie22;
01432    CFGDEVSTATUSURDETECTED <= CFGDEVSTATUSURDETECTED_v6pcie23;
01433    CFGDO <= CFGDO_v6pcie24;
01434    CFGERRAERHEADERLOGSETN <= CFGERRAERHEADERLOGSETN_v6pcie25;
01435    CFGERRCPLRDYN <= CFGERRCPLRDYN_v6pcie26;
01436    CFGINTERRUPTDO <= CFGINTERRUPTDO_v6pcie27;
01437    CFGINTERRUPTMMENABLE <= CFGINTERRUPTMMENABLE_v6pcie28;
01438    CFGINTERRUPTMSIENABLE <= CFGINTERRUPTMSIENABLE_v6pcie29;
01439    CFGINTERRUPTMSIXENABLE <= CFGINTERRUPTMSIXENABLE_v6pcie30;
01440    CFGINTERRUPTMSIXFM <= CFGINTERRUPTMSIXFM_v6pcie31;
01441    CFGINTERRUPTRDYN <= CFGINTERRUPTRDYN_v6pcie32;
01442    CFGLINKCONTROLRCB <= CFGLINKCONTROLRCB_v6pcie41;
01443    CFGLINKCONTROLASPMCONTROL <= CFGLINKCONTROLASPMCONTROL_v6pcie33;
01444    CFGLINKCONTROLAUTOBANDWIDTHINTEN <= CFGLINKCONTROLAUTOBANDWIDTHINTEN_v6pcie34;
01445    CFGLINKCONTROLBANDWIDTHINTEN <= CFGLINKCONTROLBANDWIDTHINTEN_v6pcie35;
01446    CFGLINKCONTROLCLOCKPMEN <= CFGLINKCONTROLCLOCKPMEN_v6pcie36;
01447    CFGLINKCONTROLCOMMONCLOCK <= CFGLINKCONTROLCOMMONCLOCK_v6pcie37;
01448    CFGLINKCONTROLEXTENDEDSYNC <= CFGLINKCONTROLEXTENDEDSYNC_v6pcie38;
01449    CFGLINKCONTROLHWAUTOWIDTHDIS <= CFGLINKCONTROLHWAUTOWIDTHDIS_v6pcie39;
01450    CFGLINKCONTROLLINKDISABLE <= CFGLINKCONTROLLINKDISABLE_v6pcie40;
01451    CFGLINKCONTROLRETRAINLINK <= CFGLINKCONTROLRETRAINLINK_v6pcie42;
01452    CFGLINKSTATUSAUTOBANDWIDTHSTATUS <= CFGLINKSTATUSAUTOBANDWIDTHSTATUS_v6pcie43;
01453    CFGLINKSTATUSBANDWITHSTATUS <= CFGLINKSTATUSBANDWITHSTATUS_v6pcie44;
01454    CFGLINKSTATUSCURRENTSPEED <= CFGLINKSTATUSCURRENTSPEED_v6pcie45;
01455    CFGLINKSTATUSDLLACTIVE <= CFGLINKSTATUSDLLACTIVE_v6pcie46;
01456    CFGLINKSTATUSLINKTRAINING <= CFGLINKSTATUSLINKTRAINING_v6pcie47;
01457    CFGLINKSTATUSNEGOTIATEDWIDTH <= CFGLINKSTATUSNEGOTIATEDWIDTH_v6pcie48;
01458    CFGMSGDATA <= CFGMSGDATA_v6pcie49;
01459    CFGMSGRECEIVED <= CFGMSGRECEIVED_v6pcie50;
01460    CFGMSGRECEIVEDASSERTINTA <= CFGMSGRECEIVEDASSERTINTA_v6pcie51;
01461    CFGMSGRECEIVEDASSERTINTB <= CFGMSGRECEIVEDASSERTINTB_v6pcie52;
01462    CFGMSGRECEIVEDASSERTINTC <= CFGMSGRECEIVEDASSERTINTC_v6pcie53;
01463    CFGMSGRECEIVEDASSERTINTD <= CFGMSGRECEIVEDASSERTINTD_v6pcie54;
01464    CFGMSGRECEIVEDDEASSERTINTA <= CFGMSGRECEIVEDDEASSERTINTA_v6pcie55;
01465    CFGMSGRECEIVEDDEASSERTINTB <= CFGMSGRECEIVEDDEASSERTINTB_v6pcie56;
01466    CFGMSGRECEIVEDDEASSERTINTC <= CFGMSGRECEIVEDDEASSERTINTC_v6pcie57;
01467    CFGMSGRECEIVEDDEASSERTINTD <= CFGMSGRECEIVEDDEASSERTINTD_v6pcie58;
01468    CFGMSGRECEIVEDERRCOR <= CFGMSGRECEIVEDERRCOR_v6pcie59;
01469    CFGMSGRECEIVEDERRFATAL <= CFGMSGRECEIVEDERRFATAL_v6pcie60;
01470    CFGMSGRECEIVEDERRNONFATAL <= CFGMSGRECEIVEDERRNONFATAL_v6pcie61;
01471    CFGMSGRECEIVEDPMASNAK <= CFGMSGRECEIVEDPMASNAK_v6pcie62;
01472    CFGMSGRECEIVEDPMETO <= CFGMSGRECEIVEDPMETO_v6pcie63;
01473    CFGMSGRECEIVEDPMETOACK <= CFGMSGRECEIVEDPMETOACK_v6pcie64;
01474    CFGMSGRECEIVEDPMPME <= CFGMSGRECEIVEDPMPME_v6pcie65;
01475    CFGMSGRECEIVEDSETSLOTPOWERLIMIT <= CFGMSGRECEIVEDSETSLOTPOWERLIMIT_v6pcie66;
01476    CFGMSGRECEIVEDUNLOCK <= CFGMSGRECEIVEDUNLOCK_v6pcie67;
01477    CFGPCIELINKSTATE <= CFGPCIELINKSTATE_v6pcie68;
01478    CFGPMCSRPMEEN <= CFGPMCSRPMEEN_v6pcie69;
01479    CFGPMCSRPMESTATUS <= CFGPMCSRPMESTATUS_v6pcie70;
01480    CFGPMCSRPOWERSTATE <= CFGPMCSRPOWERSTATE_v6pcie71;
01481    CFGPMRCVASREQL1N <= CFGPMRCVASREQL1N_v6pcie72;
01482    CFGPMRCVENTERL1N <= CFGPMRCVENTERL1N_v6pcie73;
01483    CFGPMRCVENTERL23N <= CFGPMRCVENTERL23N_v6pcie74;
01484    CFGPMRCVREQACKN <= CFGPMRCVREQACKN_v6pcie75;
01485    CFGRDWRDONEN <= CFGRDWRDONEN_v6pcie76;
01486    CFGSLOTCONTROLELECTROMECHILCTLPULSE <= CFGSLOTCONTROLELECTROMECHILCTLPULSE_v6pcie77;
01487    CFGTRANSACTION <= CFGTRANSACTION_v6pcie78;
01488    CFGTRANSACTIONADDR <= CFGTRANSACTIONADDR_v6pcie79;
01489    CFGTRANSACTIONTYPE <= CFGTRANSACTIONTYPE_v6pcie80;
01490    CFGVCTCVCMAP <= CFGVCTCVCMAP_v6pcie81;
01491    PLINITIALLINKWIDTH <= PLINITIALLINKWIDTH_v6pcie104;
01492    PLLANEREVERSALMODE <= PLLANEREVERSALMODE_v6pcie105;
01493    PLLINKGEN2CAP <= PLLINKGEN2CAP_v6pcie106;
01494    PLLINKPARTNERGEN2SUPPORTED <= PLLINKPARTNERGEN2SUPPORTED_v6pcie107;
01495    PLLINKUPCFGCAP <= PLLINKUPCFGCAP_v6pcie108;
01496    PLLTSSMSTATE <= PLLTSSMSTATE_v6pcie109;
01497    PLPHYLNKUPN <= PLPHYLNKUPN_v6pcie110;
01498    PLRECEIVEDHOTRST <= PLRECEIVEDHOTRST_v6pcie111;
01499    PLRXPMSTATE <= PLRXPMSTATE_v6pcie112;
01500    PLSELLNKRATE <= PLSELLNKRATE_v6pcie113;
01501    PLSELLNKWIDTH <= PLSELLNKWIDTH_v6pcie114;
01502    PLTXPMSTATE <= PLTXPMSTATE_v6pcie115;
01503    DBGSCLRA <= DBGSCLRA_v6pcie82;
01504    DBGSCLRB <= DBGSCLRB_v6pcie83;
01505    DBGSCLRC <= DBGSCLRC_v6pcie84;
01506    DBGSCLRD <= DBGSCLRD_v6pcie85;
01507    DBGSCLRE <= DBGSCLRE_v6pcie86;
01508    DBGSCLRF <= DBGSCLRF_v6pcie87;
01509    DBGSCLRG <= DBGSCLRG_v6pcie88;
01510    DBGSCLRH <= DBGSCLRH_v6pcie89;
01511    DBGSCLRI <= DBGSCLRI_v6pcie90;
01512    DBGSCLRJ <= DBGSCLRJ_v6pcie91;
01513    DBGSCLRK <= DBGSCLRK_v6pcie92;
01514    DBGVECA <= DBGVECA_v6pcie93;
01515    DBGVECB <= DBGVECB_v6pcie94;
01516    DBGVECC <= DBGVECC_v6pcie95;
01517    PLDBGVEC <= PLDBGVEC_v6pcie103;
01518    PCIEDRPDO <= PCIEDRPDO_v6pcie98;
01519    PCIEDRPDRDY <= PCIEDRPDRDY_v6pcie99;
01520    GTPLLLOCK <= GTPLLLOCK_v6pcie96;
01521    TxOutClk <= TxOutClk_v6pcie138;
01522    LL2SENDASREQL1N <= '1';
01523    LL2SENDENTERL1N <= '1';
01524    LL2SENDENTERL23N <= '1';
01525    LL2SUSPENDNOWN <= '1';
01526    LL2TLPRCVN <= '1';
01527    PL2DIRECTEDLSTATE <= "00000";
01528 
01529    -- Assignments to outputs
01530 
01531    PIPERX0CHARISK_v6pcie       <= "11" when (filter_pipe_upconfig_fix_3451 = '1') else
01532                                   PIPERX0CHARISK;
01533    PIPERX1CHARISK_v6pcie       <= "11" when (filter_pipe_upconfig_fix_3451 = '1') else
01534                                   PIPERX1CHARISK;
01535    PIPERX2CHARISK_v6pcie       <= "11" when (filter_pipe_upconfig_fix_3451 = '1') else
01536                                   PIPERX2CHARISK;
01537    PIPERX3CHARISK_v6pcie       <= "11" when (filter_pipe_upconfig_fix_3451 = '1') else
01538                                   PIPERX3CHARISK;
01539    PIPERX4CHARISK_v6pcie       <= "11" when (filter_pipe_upconfig_fix_3451 = '1') else
01540                                   PIPERX4CHARISK;
01541    PIPERX5CHARISK_v6pcie       <= "11" when (filter_pipe_upconfig_fix_3451 = '1') else
01542                                   PIPERX5CHARISK;
01543    PIPERX6CHARISK_v6pcie       <= "11" when (filter_pipe_upconfig_fix_3451 = '1') else
01544                                   PIPERX6CHARISK;
01545    PIPERX7CHARISK_v6pcie       <= "11" when (filter_pipe_upconfig_fix_3451 = '1') else
01546                                   PIPERX7CHARISK;
01547    
01548    ---------------------------------------------------------
01549    -- Virtex6 PCI Express Block Module
01550    ---------------------------------------------------------
01551    
01552    pcie_block_i : PCIE_2_0
01553       generic map (
01554          AER_BASE_PTR                              => AER_BASE_PTR,
01555          AER_CAP_ECRC_CHECK_CAPABLE                => AER_CAP_ECRC_CHECK_CAPABLE,
01556          AER_CAP_ECRC_GEN_CAPABLE                  => AER_CAP_ECRC_GEN_CAPABLE,
01557          AER_CAP_ID                                => AER_CAP_ID,
01558          AER_CAP_INT_MSG_NUM_MSI                   => AER_CAP_INT_MSG_NUM_MSI,
01559          AER_CAP_INT_MSG_NUM_MSIX                  => AER_CAP_INT_MSG_NUM_MSIX,
01560          AER_CAP_NEXTPTR                           => AER_CAP_NEXTPTR,
01561          AER_CAP_ON                                => AER_CAP_ON,
01562          AER_CAP_PERMIT_ROOTERR_UPDATE             => AER_CAP_PERMIT_ROOTERR_UPDATE,
01563          AER_CAP_VERSION                           => AER_CAP_VERSION,
01564          ALLOW_X8_GEN2                             => ALLOW_X8_GEN2,
01565          BAR0                                      => BAR0,
01566          BAR1                                      => BAR1 ,
01567          BAR2                                      => BAR2 ,
01568          BAR3                                      => BAR3 ,
01569          BAR4                                      => BAR4 ,
01570          BAR5                                      => BAR5 ,
01571          CAPABILITIES_PTR                          => CAPABILITIES_PTR,
01572          CARDBUS_CIS_POINTER                       => CARDBUS_CIS_POINTER,
01573          CLASS_CODE                                => CLASS_CODE,
01574          CMD_INTX_IMPLEMENTED                      => CMD_INTX_IMPLEMENTED,
01575          CPL_TIMEOUT_DISABLE_SUPPORTED             => CPL_TIMEOUT_DISABLE_SUPPORTED,
01576          CPL_TIMEOUT_RANGES_SUPPORTED              => CPL_TIMEOUT_RANGES_SUPPORTED,
01577          CRM_MODULE_RSTS                           => CRM_MODULE_RSTS,
01578          DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE       => DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE,
01579          DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE       => DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE,
01580          DEV_CAP_ENDPOINT_L0S_LATENCY              => DEV_CAP_ENDPOINT_L0S_LATENCY,
01581          DEV_CAP_ENDPOINT_L1_LATENCY               => DEV_CAP_ENDPOINT_L1_LATENCY,
01582          DEV_CAP_EXT_TAG_SUPPORTED                 => DEV_CAP_EXT_TAG_SUPPORTED,
01583          DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE      => DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE,
01584          DEV_CAP_MAX_PAYLOAD_SUPPORTED             => DEV_CAP_MAX_PAYLOAD_SUPPORTED,
01585          DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT         => DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT,
01586          DEV_CAP_ROLE_BASED_ERROR                  => DEV_CAP_ROLE_BASED_ERROR,
01587          DEV_CAP_RSVD_14_12                        => DEV_CAP_RSVD_14_12,
01588          DEV_CAP_RSVD_17_16                        => DEV_CAP_RSVD_17_16,
01589          DEV_CAP_RSVD_31_29                        => DEV_CAP_RSVD_31_29,
01590          DEV_CONTROL_AUX_POWER_SUPPORTED           => DEV_CONTROL_AUX_POWER_SUPPORTED,
01591          DEVICE_ID                                 => DEVICE_ID,
01592          DISABLE_ASPM_L1_TIMER                     => DISABLE_ASPM_L1_TIMER,
01593          DISABLE_BAR_FILTERING                     => DISABLE_BAR_FILTERING,
01594          DISABLE_ID_CHECK                          => DISABLE_ID_CHECK,
01595          DISABLE_LANE_REVERSAL                     => DISABLE_LANE_REVERSAL,
01596          DISABLE_RX_TC_FILTER                      => DISABLE_RX_TC_FILTER,
01597          DISABLE_SCRAMBLING                        => DISABLE_SCRAMBLING,
01598          DNSTREAM_LINK_NUM                         => DNSTREAM_LINK_NUM,
01599          DSN_BASE_PTR                               => DSN_BASE_PTR,
01600          DSN_CAP_ID                                => DSN_CAP_ID,
01601          DSN_CAP_NEXTPTR                           => DSN_CAP_NEXTPTR,
01602          DSN_CAP_ON                                 => DSN_CAP_ON,
01603          DSN_CAP_VERSION                           => DSN_CAP_VERSION,
01604          ENABLE_MSG_ROUTE                          => ENABLE_MSG_ROUTE,
01605          ENABLE_RX_TD_ECRC_TRIM                     => ENABLE_RX_TD_ECRC_TRIM,
01606          ENTER_RVRY_EI_L0                          => ENTER_RVRY_EI_L0,
01607          EXPANSION_ROM                             => EXPANSION_ROM,
01608          EXT_CFG_CAP_PTR                            => EXT_CFG_CAP_PTR,
01609          EXT_CFG_XP_CAP_PTR                        => EXT_CFG_XP_CAP_PTR,
01610          HEADER_TYPE                               => HEADER_TYPE,
01611          INFER_EI                                   => INFER_EI,
01612          INTERRUPT_PIN                             => INTERRUPT_PIN,
01613          IS_SWITCH                                 => IS_SWITCH,
01614          LAST_CONFIG_DWORD                          => LAST_CONFIG_DWORD,
01615          LINK_CAP_ASPM_SUPPORT                      => LINK_CAP_ASPM_SUPPORT,
01616          LINK_CAP_CLOCK_POWER_MANAGEMENT           => LINK_CAP_CLOCK_POWER_MANAGEMENT,
01617          LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP     => LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP,
01618          LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP   => LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP,
01619          LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1     => LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1,
01620          LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2      => LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2,
01621          LINK_CAP_L0S_EXIT_LATENCY_GEN1             => LINK_CAP_L0S_EXIT_LATENCY_GEN1,
01622          LINK_CAP_L0S_EXIT_LATENCY_GEN2            => LINK_CAP_L0S_EXIT_LATENCY_GEN2,
01623          LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1       => LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1,
01624          LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2       => LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2,
01625          LINK_CAP_L1_EXIT_LATENCY_GEN1             => LINK_CAP_L1_EXIT_LATENCY_GEN1,
01626          LINK_CAP_L1_EXIT_LATENCY_GEN2              => LINK_CAP_L1_EXIT_LATENCY_GEN2,
01627          LINK_CAP_MAX_LINK_SPEED                    => LINK_CAP_MAX_LINK_SPEED,
01628          LINK_CAP_MAX_LINK_WIDTH                   => LINK_CAP_MAX_LINK_WIDTH,
01629          LINK_CAP_RSVD_23_22                        => LINK_CAP_RSVD_23_22,
01630          LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE       => LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE,
01631          LINK_CONTROL_RCB                          => LINK_CONTROL_RCB,
01632          LINK_CTRL2_DEEMPHASIS                      => LINK_CTRL2_DEEMPHASIS,
01633          LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE     => LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE,
01634          LINK_CTRL2_TARGET_LINK_SPEED              => LINK_CTRL2_TARGET_LINK_SPEED,
01635          LINK_STATUS_SLOT_CLOCK_CONFIG              => LINK_STATUS_SLOT_CLOCK_CONFIG,
01636          LL_ACK_TIMEOUT                             => LL_ACK_TIMEOUT,
01637          LL_ACK_TIMEOUT_EN                         => LL_ACK_TIMEOUT_EN,
01638          LL_ACK_TIMEOUT_FUNC                        => LL_ACK_TIMEOUT_FUNC,
01639          LL_REPLAY_TIMEOUT                          => LL_REPLAY_TIMEOUT,
01640          LL_REPLAY_TIMEOUT_EN                       => LL_REPLAY_TIMEOUT_EN,
01641          LL_REPLAY_TIMEOUT_FUNC                     => LL_REPLAY_TIMEOUT_FUNC,
01642          LTSSM_MAX_LINK_WIDTH                       => LTSSM_MAX_LINK_WIDTH,
01643          MSI_BASE_PTR                               => MSI_BASE_PTR,
01644          MSI_CAP_ID                                 => MSI_CAP_ID,
01645          MSI_CAP_MULTIMSGCAP                        => MSI_CAP_MULTIMSGCAP,
01646          MSI_CAP_MULTIMSG_EXTENSION                => MSI_CAP_MULTIMSG_EXTENSION,
01647          MSI_CAP_NEXTPTR                           => MSI_CAP_NEXTPTR,
01648          MSI_CAP_ON                                => MSI_CAP_ON,
01649          MSI_CAP_PER_VECTOR_MASKING_CAPABLE         => MSI_CAP_PER_VECTOR_MASKING_CAPABLE,
01650          MSI_CAP_64_BIT_ADDR_CAPABLE                => MSI_CAP_64_BIT_ADDR_CAPABLE,
01651          MSIX_BASE_PTR                              => MSIX_BASE_PTR,
01652          MSIX_CAP_ID                               => MSIX_CAP_ID,
01653          MSIX_CAP_NEXTPTR                          => MSIX_CAP_NEXTPTR,
01654          MSIX_CAP_ON                                => MSIX_CAP_ON,
01655          MSIX_CAP_PBA_BIR                          => MSIX_CAP_PBA_BIR,
01656          MSIX_CAP_PBA_OFFSET                       => MSIX_CAP_PBA_OFFSET,
01657          MSIX_CAP_TABLE_BIR                         => MSIX_CAP_TABLE_BIR,
01658          MSIX_CAP_TABLE_OFFSET                     => MSIX_CAP_TABLE_OFFSET,
01659          MSIX_CAP_TABLE_SIZE                       => MSIX_CAP_TABLE_SIZE,
01660          N_FTS_COMCLK_GEN1                          => N_FTS_COMCLK_GEN1,
01661          N_FTS_COMCLK_GEN2                          => N_FTS_COMCLK_GEN2,
01662          N_FTS_GEN1                                 => N_FTS_GEN1,
01663          N_FTS_GEN2                                 => N_FTS_GEN2,
01664          PCIE_BASE_PTR                              => PCIE_BASE_PTR,
01665          PCIE_CAP_CAPABILITY_ID                     => PCIE_CAP_CAPABILITY_ID,
01666          PCIE_CAP_CAPABILITY_VERSION                => PCIE_CAP_CAPABILITY_VERSION,
01667          PCIE_CAP_DEVICE_PORT_TYPE                  => PCIE_CAP_DEVICE_PORT_TYPE,
01668          PCIE_CAP_INT_MSG_NUM                       => PCIE_CAP_INT_MSG_NUM,
01669          PCIE_CAP_NEXTPTR                          => PCIE_CAP_NEXTPTR,
01670          PCIE_CAP_ON                                => PCIE_CAP_ON,
01671          PCIE_CAP_RSVD_15_14                        => PCIE_CAP_RSVD_15_14,
01672          PCIE_CAP_SLOT_IMPLEMENTED                  => PCIE_CAP_SLOT_IMPLEMENTED,
01673          PCIE_REVISION                              => PCIE_REVISION,
01674          PGL0_LANE                                  => PGL0_LANE,
01675          PGL1_LANE                                 => PGL1_LANE,
01676          PGL2_LANE                                  => PGL2_LANE,
01677          PGL3_LANE                                  => PGL3_LANE,
01678          PGL4_LANE                                 => PGL4_LANE,
01679          PGL5_LANE                                  => PGL5_LANE,
01680          PGL6_LANE                                  => PGL6_LANE,
01681          PGL7_LANE                                 => PGL7_LANE,
01682          PL_AUTO_CONFIG                             => PL_AUTO_CONFIG,
01683          PL_FAST_TRAIN                              => PL_FAST_TRAIN,
01684          PM_BASE_PTR                               => PM_BASE_PTR,
01685          PM_CAP_AUXCURRENT                          => PM_CAP_AUXCURRENT,
01686          PM_CAP_DSI                                 => PM_CAP_DSI,
01687          PM_CAP_D1SUPPORT                          => PM_CAP_D1SUPPORT,
01688          PM_CAP_D2SUPPORT                           => PM_CAP_D2SUPPORT,
01689          PM_CAP_ID                                  => PM_CAP_ID,
01690          PM_CAP_NEXTPTR                            => PM_CAP_NEXTPTR,
01691          PM_CAP_ON                                  => PM_CAP_ON,
01692          PM_CAP_PME_CLOCK                           => PM_CAP_PME_CLOCK,
01693          PM_CAP_PMESUPPORT                         => PM_CAP_PMESUPPORT,
01694          PM_CAP_RSVD_04                             => PM_CAP_RSVD_04,
01695          PM_CAP_VERSION                             => PM_CAP_VERSION,
01696          PM_CSR_BPCCEN                             => PM_CSR_BPCCEN,
01697          PM_CSR_B2B3                                => PM_CSR_B2B3,
01698          PM_CSR_NOSOFTRST                           => PM_CSR_NOSOFTRST,
01699          PM_DATA_SCALE0                            => PM_DATA_SCALE0,
01700          PM_DATA_SCALE1                             => PM_DATA_SCALE1,
01701          PM_DATA_SCALE2                             => PM_DATA_SCALE2,
01702          PM_DATA_SCALE3                            => PM_DATA_SCALE3,
01703          PM_DATA_SCALE4                             => PM_DATA_SCALE4,
01704          PM_DATA_SCALE5                             => PM_DATA_SCALE5,
01705          PM_DATA_SCALE6                            => PM_DATA_SCALE6,
01706          PM_DATA_SCALE7                             => PM_DATA_SCALE7,
01707          PM_DATA0                                   => PM_DATA0,
01708          PM_DATA1                                  => PM_DATA1,
01709          PM_DATA2                                   => PM_DATA2,
01710          PM_DATA3                                   => PM_DATA3,
01711          PM_DATA4                                  => PM_DATA4,
01712          PM_DATA5                                   => PM_DATA5,
01713          PM_DATA6                                   => PM_DATA6,
01714          PM_DATA7                                  => PM_DATA7,
01715          RECRC_CHK                                  => RECRC_CHK,
01716          RECRC_CHK_TRIM                             => RECRC_CHK_TRIM,
01717          REVISION_ID                               => REVISION_ID,
01718          ROOT_CAP_CRS_SW_VISIBILITY                 => ROOT_CAP_CRS_SW_VISIBILITY,
01719          SELECT_DLL_IF                              => SELECT_DLL_IF,
01720          SLOT_CAP_ATT_BUTTON_PRESENT               => SLOT_CAP_ATT_BUTTON_PRESENT,
01721          SLOT_CAP_ATT_INDICATOR_PRESENT            => SLOT_CAP_ATT_INDICATOR_PRESENT,
01722          SLOT_CAP_ELEC_INTERLOCK_PRESENT           => SLOT_CAP_ELEC_INTERLOCK_PRESENT ,
01723          SLOT_CAP_HOTPLUG_CAPABLE                   => SLOT_CAP_HOTPLUG_CAPABLE,
01724          SLOT_CAP_HOTPLUG_SURPRISE                 => SLOT_CAP_HOTPLUG_SURPRISE,
01725          SLOT_CAP_MRL_SENSOR_PRESENT               => SLOT_CAP_MRL_SENSOR_PRESENT,
01726          SLOT_CAP_NO_CMD_COMPLETED_SUPPORT         => SLOT_CAP_NO_CMD_COMPLETED_SUPPORT,
01727          SLOT_CAP_PHYSICAL_SLOT_NUM                 => SLOT_CAP_PHYSICAL_SLOT_NUM,
01728          SLOT_CAP_POWER_CONTROLLER_PRESENT          => SLOT_CAP_POWER_CONTROLLER_PRESENT,
01729          SLOT_CAP_POWER_INDICATOR_PRESENT          => SLOT_CAP_POWER_INDICATOR_PRESENT,
01730          SLOT_CAP_SLOT_POWER_LIMIT_SCALE           => SLOT_CAP_SLOT_POWER_LIMIT_SCALE,
01731          SLOT_CAP_SLOT_POWER_LIMIT_VALUE            => SLOT_CAP_SLOT_POWER_LIMIT_VALUE,
01732          SPARE_BIT0                                => SPARE_BIT0,
01733          SPARE_BIT1                                => SPARE_BIT1,
01734          SPARE_BIT2                                 => SPARE_BIT2,
01735          SPARE_BIT3                                => SPARE_BIT3,
01736          SPARE_BIT4                                => SPARE_BIT4,
01737          SPARE_BIT5                                 => SPARE_BIT5,
01738          SPARE_BIT6                                => SPARE_BIT6,
01739          SPARE_BIT7                                => SPARE_BIT7,
01740          SPARE_BIT8                                 => SPARE_BIT8,
01741          SPARE_BYTE0                               => SPARE_BYTE0,
01742          SPARE_BYTE1                               => SPARE_BYTE1,
01743          SPARE_BYTE2                                => SPARE_BYTE2,
01744          SPARE_BYTE3                               => SPARE_BYTE3,
01745          SPARE_WORD0                               => SPARE_WORD0,
01746          SPARE_WORD1                                => SPARE_WORD1,
01747          SPARE_WORD2                               => SPARE_WORD2,
01748          SPARE_WORD3                               => SPARE_WORD3,
01749          SUBSYSTEM_ID                               => SUBSYSTEM_ID,
01750          SUBSYSTEM_VENDOR_ID                       => SUBSYSTEM_VENDOR_ID,
01751          TL_RBYPASS                                => TL_RBYPASS,
01752          TL_RX_RAM_RADDR_LATENCY                    => TL_RX_RAM_RADDR_LATENCY,
01753          TL_RX_RAM_RDATA_LATENCY                   => TL_RX_RAM_RDATA_LATENCY,
01754          TL_RX_RAM_WRITE_LATENCY                   => TL_RX_RAM_WRITE_LATENCY,
01755          TL_TFC_DISABLE                             => TL_TFC_DISABLE,
01756          TL_TX_CHECKS_DISABLE                      => TL_TX_CHECKS_DISABLE,
01757          TL_TX_RAM_RADDR_LATENCY                   => TL_TX_RAM_RADDR_LATENCY,
01758          TL_TX_RAM_RDATA_LATENCY                    => TL_TX_RAM_RDATA_LATENCY,
01759          TL_TX_RAM_WRITE_LATENCY                   => TL_TX_RAM_WRITE_LATENCY,
01760          UPCONFIG_CAPABLE                          => UPCONFIG_CAPABLE,
01761          UPSTREAM_FACING                            => UPSTREAM_FACING,
01762          EXIT_LOOPBACK_ON_EI                       => EXIT_LOOPBACK_ON_EI,
01763          UR_INV_REQ                                => UR_INV_REQ,
01764          USER_CLK_FREQ                              => USER_CLK_FREQ,
01765          VC_BASE_PTR                               => VC_BASE_PTR,
01766          VC_CAP_ID                                 => VC_CAP_ID,
01767          VC_CAP_NEXTPTR                             => VC_CAP_NEXTPTR,
01768          VC_CAP_ON                                 => VC_CAP_ON,
01769          VC_CAP_REJECT_SNOOP_TRANSACTIONS          => VC_CAP_REJECT_SNOOP_TRANSACTIONS,
01770          VC_CAP_VERSION                             => VC_CAP_VERSION,
01771          VC0_CPL_INFINITE                          => VC0_CPL_INFINITE,
01772          VC0_RX_RAM_LIMIT                          => VC0_RX_RAM_LIMIT,
01773          VC0_TOTAL_CREDITS_CD                       => VC0_TOTAL_CREDITS_CD,
01774          VC0_TOTAL_CREDITS_CH                      => VC0_TOTAL_CREDITS_CH,
01775          VC0_TOTAL_CREDITS_NPH                     => VC0_TOTAL_CREDITS_NPH,
01776          VC0_TOTAL_CREDITS_PD                       => VC0_TOTAL_CREDITS_PD,
01777          VC0_TOTAL_CREDITS_PH                      => VC0_TOTAL_CREDITS_PH,
01778          VC0_TX_LASTPACKET                         => VC0_TX_LASTPACKET,
01779          VENDOR_ID                                  => VENDOR_ID,
01780          VSEC_BASE_PTR                             => VSEC_BASE_PTR,
01781          VSEC_CAP_HDR_ID                           => VSEC_CAP_HDR_ID,
01782          VSEC_CAP_HDR_LENGTH                        => VSEC_CAP_HDR_LENGTH,
01783          VSEC_CAP_HDR_REVISION                     => VSEC_CAP_HDR_REVISION,
01784          VSEC_CAP_ID                               => VSEC_CAP_ID,
01785          VSEC_CAP_IS_LINK_VISIBLE                  => VSEC_CAP_IS_LINK_VISIBLE,
01786          VSEC_CAP_NEXTPTR                          => VSEC_CAP_NEXTPTR,
01787          VSEC_CAP_ON                               => VSEC_CAP_ON,
01788          VSEC_CAP_VERSION                           => VSEC_CAP_VERSION
01789       )
01790       port map (
01791          CFGAERECRCCHECKEN                    => CFGAERECRCCHECKEN_v6pcie0,
01792          CFGAERECRCGENEN                      => CFGAERECRCGENEN_v6pcie1,
01793          CFGCOMMANDBUSMASTERENABLE            => CFGCOMMANDBUSMASTERENABLE_v6pcie2 ,
01794          CFGCOMMANDINTERRUPTDISABLE           => CFGCOMMANDINTERRUPTDISABLE_v6pcie3,
01795          CFGCOMMANDIOENABLE                   => CFGCOMMANDIOENABLE_v6pcie4,
01796          CFGCOMMANDMEMENABLE                  => CFGCOMMANDMEMENABLE_v6pcie5,
01797          CFGCOMMANDSERREN                     => CFGCOMMANDSERREN_v6pcie6,
01798          CFGDEVCONTROLAUXPOWEREN              => CFGDEVCONTROLAUXPOWEREN_v6pcie9,
01799          CFGDEVCONTROLCORRERRREPORTINGEN      => CFGDEVCONTROLCORRERRREPORTINGEN_v6pcie10 ,
01800          CFGDEVCONTROLENABLERO                => CFGDEVCONTROLENABLERO_v6pcie11,
01801          CFGDEVCONTROLEXTTAGEN                => CFGDEVCONTROLEXTTAGEN_v6pcie12,
01802          CFGDEVCONTROLFATALERRREPORTINGEN     => CFGDEVCONTROLFATALERRREPORTINGEN_v6pcie13 ,
01803          CFGDEVCONTROLMAXPAYLOAD              => CFGDEVCONTROLMAXPAYLOAD_v6pcie14,
01804          CFGDEVCONTROLMAXREADREQ              => CFGDEVCONTROLMAXREADREQ_v6pcie15,
01805          CFGDEVCONTROLNONFATALREPORTINGEN     => CFGDEVCONTROLNONFATALREPORTINGEN_v6pcie16 ,
01806          CFGDEVCONTROLNOSNOOPEN               => CFGDEVCONTROLNOSNOOPEN_v6pcie17,
01807          CFGDEVCONTROLPHANTOMEN               => CFGDEVCONTROLPHANTOMEN_v6pcie18,
01808          CFGDEVCONTROLURERRREPORTINGEN        => CFGDEVCONTROLURERRREPORTINGEN_v6pcie19,
01809          CFGDEVCONTROL2CPLTIMEOUTDIS          => CFGDEVCONTROL2CPLTIMEOUTDIS_v6pcie7,
01810          CFGDEVCONTROL2CPLTIMEOUTVAL          => CFGDEVCONTROL2CPLTIMEOUTVAL_v6pcie8,
01811          CFGDEVSTATUSCORRERRDETECTED          => CFGDEVSTATUSCORRERRDETECTED_v6pcie20,
01812          CFGDEVSTATUSFATALERRDETECTED         => CFGDEVSTATUSFATALERRDETECTED_v6pcie21,
01813          CFGDEVSTATUSNONFATALERRDETECTED      => CFGDEVSTATUSNONFATALERRDETECTED_v6pcie22 ,
01814          CFGDEVSTATUSURDETECTED               => CFGDEVSTATUSURDETECTED_v6pcie23,
01815          CFGDO                                => CFGDO_v6pcie24,
01816          CFGERRAERHEADERLOGSETN               => CFGERRAERHEADERLOGSETN_v6pcie25,
01817          CFGERRCPLRDYN                        => CFGERRCPLRDYN_v6pcie26,
01818          CFGINTERRUPTDO                       => CFGINTERRUPTDO_v6pcie27,
01819          CFGINTERRUPTMMENABLE                 => CFGINTERRUPTMMENABLE_v6pcie28,
01820          CFGINTERRUPTMSIENABLE                => CFGINTERRUPTMSIENABLE_v6pcie29,
01821          CFGINTERRUPTMSIXENABLE               => CFGINTERRUPTMSIXENABLE_v6pcie30,
01822          CFGINTERRUPTMSIXFM                   => CFGINTERRUPTMSIXFM_v6pcie31,
01823          CFGINTERRUPTRDYN                     => CFGINTERRUPTRDYN_v6pcie32,
01824          CFGLINKCONTROLRCB                    => CFGLINKCONTROLRCB_v6pcie41,
01825          CFGLINKCONTROLASPMCONTROL            => CFGLINKCONTROLASPMCONTROL_v6pcie33,
01826          CFGLINKCONTROLAUTOBANDWIDTHINTEN     => CFGLINKCONTROLAUTOBANDWIDTHINTEN_v6pcie34 ,
01827          CFGLINKCONTROLBANDWIDTHINTEN         => CFGLINKCONTROLBANDWIDTHINTEN_v6pcie35,
01828          CFGLINKCONTROLCLOCKPMEN              => CFGLINKCONTROLCLOCKPMEN_v6pcie36,
01829          CFGLINKCONTROLCOMMONCLOCK            => CFGLINKCONTROLCOMMONCLOCK_v6pcie37,
01830          CFGLINKCONTROLEXTENDEDSYNC           => CFGLINKCONTROLEXTENDEDSYNC_v6pcie38,
01831          CFGLINKCONTROLHWAUTOWIDTHDIS         => CFGLINKCONTROLHWAUTOWIDTHDIS_v6pcie39,
01832          CFGLINKCONTROLLINKDISABLE            => CFGLINKCONTROLLINKDISABLE_v6pcie40,
01833          CFGLINKCONTROLRETRAINLINK            => CFGLINKCONTROLRETRAINLINK_v6pcie42,
01834          CFGLINKSTATUSAUTOBANDWIDTHSTATUS     => CFGLINKSTATUSAUTOBANDWIDTHSTATUS_v6pcie43 ,
01835          CFGLINKSTATUSBANDWITHSTATUS          => CFGLINKSTATUSBANDWITHSTATUS_v6pcie44,
01836          CFGLINKSTATUSCURRENTSPEED            => CFGLINKSTATUSCURRENTSPEED_v6pcie45,
01837          CFGLINKSTATUSDLLACTIVE               => CFGLINKSTATUSDLLACTIVE_v6pcie46,
01838          CFGLINKSTATUSLINKTRAINING            => CFGLINKSTATUSLINKTRAINING_v6pcie47,
01839          CFGLINKSTATUSNEGOTIATEDWIDTH         => CFGLINKSTATUSNEGOTIATEDWIDTH_v6pcie48,
01840          CFGMSGDATA                           => CFGMSGDATA_v6pcie49,
01841          CFGMSGRECEIVED                       => CFGMSGRECEIVED_v6pcie50,
01842          CFGMSGRECEIVEDASSERTINTA             => CFGMSGRECEIVEDASSERTINTA_v6pcie51,
01843          CFGMSGRECEIVEDASSERTINTB             => CFGMSGRECEIVEDASSERTINTB_v6pcie52,
01844          CFGMSGRECEIVEDASSERTINTC             => CFGMSGRECEIVEDASSERTINTC_v6pcie53,
01845          CFGMSGRECEIVEDASSERTINTD             => CFGMSGRECEIVEDASSERTINTD_v6pcie54,
01846          CFGMSGRECEIVEDDEASSERTINTA           => CFGMSGRECEIVEDDEASSERTINTA_v6pcie55,
01847          CFGMSGRECEIVEDDEASSERTINTB           => CFGMSGRECEIVEDDEASSERTINTB_v6pcie56,
01848          CFGMSGRECEIVEDDEASSERTINTC           => CFGMSGRECEIVEDDEASSERTINTC_v6pcie57,
01849          CFGMSGRECEIVEDDEASSERTINTD           => CFGMSGRECEIVEDDEASSERTINTD_v6pcie58,
01850          CFGMSGRECEIVEDERRCOR                 => CFGMSGRECEIVEDERRCOR_v6pcie59,
01851          CFGMSGRECEIVEDERRFATAL               => CFGMSGRECEIVEDERRFATAL_v6pcie60,
01852          CFGMSGRECEIVEDERRNONFATAL            => CFGMSGRECEIVEDERRNONFATAL_v6pcie61,
01853          CFGMSGRECEIVEDPMASNAK                => CFGMSGRECEIVEDPMASNAK_v6pcie62,
01854          CFGMSGRECEIVEDPMETO                  => CFGMSGRECEIVEDPMETO_v6pcie63,
01855          CFGMSGRECEIVEDPMETOACK               => CFGMSGRECEIVEDPMETOACK_v6pcie64,
01856          CFGMSGRECEIVEDPMPME                  => CFGMSGRECEIVEDPMPME_v6pcie65,
01857          CFGMSGRECEIVEDSETSLOTPOWERLIMIT      => CFGMSGRECEIVEDSETSLOTPOWERLIMIT_v6pcie66 ,
01858          CFGMSGRECEIVEDUNLOCK                 => CFGMSGRECEIVEDUNLOCK_v6pcie67,
01859          CFGPCIELINKSTATE                     => CFGPCIELINKSTATE_v6pcie68,
01860          CFGPMRCVASREQL1N                     => CFGPMRCVASREQL1N_v6pcie72,
01861          CFGPMRCVENTERL1N                     => CFGPMRCVENTERL1N_v6pcie73,
01862          CFGPMRCVENTERL23N                    => CFGPMRCVENTERL23N_v6pcie74,
01863          CFGPMRCVREQACKN                      => CFGPMRCVREQACKN_v6pcie75,
01864          CFGPMCSRPMEEN                        => CFGPMCSRPMEEN_v6pcie69,
01865          CFGPMCSRPMESTATUS                    => CFGPMCSRPMESTATUS_v6pcie70,
01866          CFGPMCSRPOWERSTATE                   => CFGPMCSRPOWERSTATE_v6pcie71,
01867          CFGRDWRDONEN                         => CFGRDWRDONEN_v6pcie76,
01868          CFGSLOTCONTROLELECTROMECHILCTLPULSE  => CFGSLOTCONTROLELECTROMECHILCTLPULSE_v6pcie77,
01869          CFGTRANSACTION                       => CFGTRANSACTION_v6pcie78,
01870          CFGTRANSACTIONADDR                   => CFGTRANSACTIONADDR_v6pcie79,
01871          CFGTRANSACTIONTYPE                   => CFGTRANSACTIONTYPE_v6pcie80,
01872          CFGVCTCVCMAP                         => CFGVCTCVCMAP_v6pcie81,
01873          DBGSCLRA                             => DBGSCLRA_v6pcie82,
01874          DBGSCLRB                             => DBGSCLRB_v6pcie83,
01875          DBGSCLRC                             => DBGSCLRC_v6pcie84,
01876          DBGSCLRD                             => DBGSCLRD_v6pcie85,
01877          DBGSCLRE                             => DBGSCLRE_v6pcie86,
01878          DBGSCLRF                             => DBGSCLRF_v6pcie87,
01879          DBGSCLRG                             => DBGSCLRG_v6pcie88,
01880          DBGSCLRH                             => DBGSCLRH_v6pcie89,
01881          DBGSCLRI                             => DBGSCLRI_v6pcie90,
01882          DBGSCLRJ                             => DBGSCLRJ_v6pcie91,
01883          DBGSCLRK                             => DBGSCLRK_v6pcie92,
01884          DBGVECA                              => DBGVECA_v6pcie93,
01885          DBGVECB                              => DBGVECB_v6pcie94,
01886          DBGVECC                              => DBGVECC_v6pcie95,
01887          DRPDO                                => PCIEDRPDO_v6pcie98,
01888          DRPDRDY                              => PCIEDRPDRDY_v6pcie99,
01889          LL2BADDLLPERRN                       => LL2BADDLLPERRN,
01890          LL2BADTLPERRN                        => LL2BADTLPERRN,
01891          LL2PROTOCOLERRN                      => LL2PROTOCOLERRN,
01892          LL2REPLAYROERRN                      => LL2REPLAYROERRN,
01893          LL2REPLAYTOERRN                      => LL2REPLAYTOERRN,
01894          LL2SUSPENDOKN                        => LL2SUSPENDOKN,
01895          LL2TFCINIT1SEQN                      => LL2TFCINIT1SEQN,
01896          LL2TFCINIT2SEQN                      => LL2TFCINIT2SEQN,
01897          MIMRXRADDR                           => MIMRXRADDR,
01898          MIMRXRCE                             => MIMRXRCE,
01899          MIMRXREN                             => MIMRXREN,
01900          MIMRXWADDR                           => MIMRXWADDR,
01901          MIMRXWDATA                           => MIMRXWDATA,
01902          MIMRXWEN                             => MIMRXWEN,
01903          MIMTXRADDR                           => MIMTXRADDR,
01904          MIMTXRCE                             => MIMTXRCE,
01905          MIMTXREN                             => MIMTXREN,
01906          MIMTXWADDR                           => MIMTXWADDR,
01907          MIMTXWDATA                           => MIMTXWDATA,
01908          MIMTXWEN                             => MIMTXWEN,
01909          PIPERX0POLARITY                      => PIPERX0POLARITY,
01910          PIPERX1POLARITY                      => PIPERX1POLARITY,
01911          PIPERX2POLARITY                      => PIPERX2POLARITY,
01912          PIPERX3POLARITY                      => PIPERX3POLARITY,
01913          PIPERX4POLARITY                      => PIPERX4POLARITY,
01914          PIPERX5POLARITY                      => PIPERX5POLARITY,
01915          PIPERX6POLARITY                      => PIPERX6POLARITY,
01916          PIPERX7POLARITY                      => PIPERX7POLARITY,
01917          PIPETXDEEMPH                         => PIPETXDEEMPH,
01918          PIPETXMARGIN                         => PIPETXMARGIN,
01919          PIPETXRATE                           => PIPETXRATE,
01920          PIPETXRCVRDET                        => PIPETXRCVRDET,
01921          PIPETXRESET                          => PIPETXRESET,
01922          PIPETX0CHARISK                       => PIPETX0CHARISK,
01923          PIPETX0COMPLIANCE                    => PIPETX0COMPLIANCE,
01924          PIPETX0DATA                          => PIPETX0DATA,
01925          PIPETX0ELECIDLE                      => PIPETX0ELECIDLE,
01926          PIPETX0POWERDOWN                     => PIPETX0POWERDOWN,
01927          PIPETX1CHARISK                       => PIPETX1CHARISK,
01928          PIPETX1COMPLIANCE                    => PIPETX1COMPLIANCE,
01929          PIPETX1DATA                          => PIPETX1DATA,
01930          PIPETX1ELECIDLE                      => PIPETX1ELECIDLE,
01931          PIPETX1POWERDOWN                     => PIPETX1POWERDOWN,
01932          PIPETX2CHARISK                       => PIPETX2CHARISK,
01933          PIPETX2COMPLIANCE                    => PIPETX2COMPLIANCE,
01934          PIPETX2DATA                          => PIPETX2DATA,
01935          PIPETX2ELECIDLE                      => PIPETX2ELECIDLE,
01936          PIPETX2POWERDOWN                     => PIPETX2POWERDOWN,
01937          PIPETX3CHARISK                       => PIPETX3CHARISK,
01938          PIPETX3COMPLIANCE                    => PIPETX3COMPLIANCE,
01939          PIPETX3DATA                          => PIPETX3DATA,
01940          PIPETX3ELECIDLE                      => PIPETX3ELECIDLE,
01941          PIPETX3POWERDOWN                     => PIPETX3POWERDOWN,
01942          PIPETX4CHARISK                       => PIPETX4CHARISK,
01943          PIPETX4COMPLIANCE                    => PIPETX4COMPLIANCE,
01944          PIPETX4DATA                          => PIPETX4DATA,
01945          PIPETX4ELECIDLE                      => PIPETX4ELECIDLE,
01946          PIPETX4POWERDOWN                     => PIPETX4POWERDOWN,
01947          PIPETX5CHARISK                       => PIPETX5CHARISK,
01948          PIPETX5COMPLIANCE                    => PIPETX5COMPLIANCE,
01949          PIPETX5DATA                          => PIPETX5DATA,
01950          PIPETX5ELECIDLE                      => PIPETX5ELECIDLE,
01951          PIPETX5POWERDOWN                     => PIPETX5POWERDOWN,
01952          PIPETX6CHARISK                       => PIPETX6CHARISK,
01953          PIPETX6COMPLIANCE                    => PIPETX6COMPLIANCE,
01954          PIPETX6DATA                          => PIPETX6DATA,
01955          PIPETX6ELECIDLE                      => PIPETX6ELECIDLE,
01956          PIPETX6POWERDOWN                     => PIPETX6POWERDOWN,
01957          PIPETX7CHARISK                       => PIPETX7CHARISK,
01958          PIPETX7COMPLIANCE                    => PIPETX7COMPLIANCE,
01959          PIPETX7DATA                          => PIPETX7DATA,
01960          PIPETX7ELECIDLE                      => PIPETX7ELECIDLE,
01961          PIPETX7POWERDOWN                     => PIPETX7POWERDOWN,
01962          PLDBGVEC                             => PLDBGVEC_v6pcie103,
01963          PLINITIALLINKWIDTH                   => PLINITIALLINKWIDTH_v6pcie104,
01964          PLLANEREVERSALMODE                   => PLLANEREVERSALMODE_v6pcie105,
01965          PLLINKGEN2CAP                        => PLLINKGEN2CAP_v6pcie106,
01966          PLLINKPARTNERGEN2SUPPORTED           => PLLINKPARTNERGEN2SUPPORTED_v6pcie107 ,
01967          PLLINKUPCFGCAP                       => PLLINKUPCFGCAP_v6pcie108,
01968          PLLTSSMSTATE                         => PLLTSSMSTATE_v6pcie109,
01969          PLPHYLNKUPN                          => PLPHYLNKUPN_v6pcie110,
01970          PLRECEIVEDHOTRST                     => PLRECEIVEDHOTRST_v6pcie111,
01971          PLRXPMSTATE                          => PLRXPMSTATE_v6pcie112,
01972          PLSELLNKRATE                         => PLSELLNKRATE_v6pcie113,
01973          PLSELLNKWIDTH                        => PLSELLNKWIDTH_v6pcie114,
01974          PLTXPMSTATE                          => PLTXPMSTATE_v6pcie115,
01975          PL2LINKUPN                           => PL2LINKUPN,
01976          PL2RECEIVERERRN                      => PL2RECEIVERERRN,
01977          PL2RECOVERYN                         => PL2RECOVERYN,
01978          PL2RXELECIDLE                        => PL2RXELECIDLE,
01979          PL2SUSPENDOK                         => PL2SUSPENDOK,
01980          RECEIVEDFUNCLVLRSTN                  => RECEIVEDFUNCLVLRSTN_v6pcie116,
01981          LNKCLKEN                             => LNKCLKEN_v6pcie97,
01982          TL2ASPMSUSPENDCREDITCHECKOKN         => TL2ASPMSUSPENDCREDITCHECKOKN,
01983          TL2ASPMSUSPENDREQN                   => TL2ASPMSUSPENDREQN,
01984          TL2PPMSUSPENDOKN                     => TL2PPMSUSPENDOKN,
01985          TRNFCCPLD                            => TRNFCCPLD_v6pcie117,
01986          TRNFCCPLH                            => TRNFCCPLH_v6pcie118,
01987          TRNFCNPD                             => TRNFCNPD_v6pcie119,
01988          TRNFCNPH                             => TRNFCNPH_v6pcie120,
01989          TRNFCPD                              => TRNFCPD_v6pcie121,
01990          TRNFCPH                              => TRNFCPH_v6pcie122,
01991          TRNLNKUPN                            => TRNLNKUPN_v6pcie123,
01992          TRNRBARHITN                          => TRNRBARHITN_v6pcie124,
01993          TRNRD                                => TRNRD_v6pcie125,
01994          TRNRDLLPDATA                         => TRNRDLLPDATA,
01995          TRNRDLLPSRCRDYN                      => TRNRDLLPSRCRDYN,
01996          TRNRECRCERRN                         => TRNRECRCERRN_v6pcie126,
01997          TRNREOFN                             => TRNREOFN_v6pcie127,
01998          TRNRERRFWDN                          => TRNRERRFWDN_v6pcie128,
01999          TRNRREMN                             => TRNRREMN_v6pcie129,
02000          TRNRSOFN                             => TRNRSOFN_v6pcie130,
02001          TRNRSRCDSCN                          => TRNRSRCDSCN_v6pcie131,
02002          TRNRSRCRDYN                          => TRNRSRCRDYN_v6pcie132,
02003          TRNTBUFAV                            => TRNTBUFAV_v6pcie133,
02004          TRNTCFGREQN                          => TRNTCFGREQN_v6pcie134,
02005          
02006          TRNTDLLPDSTRDYN                      => TRNTDLLPDSTRDYN_v6pcie135,
02007          TRNTDSTRDYN                          => TRNTDSTRDYN_v6pcie136,
02008          TRNTERRDROPN                         => TRNTERRDROPN_v6pcie137,
02009          
02010          USERRSTN                             => USERRSTN_v6pcie139,
02011          
02012          CFGBYTEENN                           => CFGBYTEENN ,
02013          CFGDI                                => CFGDI,
02014          
02015          CFGDSBUSNUMBER                       => CFGDSBUSNUMBER,
02016          CFGDSDEVICENUMBER                    => CFGDSDEVICENUMBER,
02017          
02018          CFGDSFUNCTIONNUMBER                  => CFGDSFUNCTIONNUMBER,
02019          CFGDSN                               => CFGDSN,
02020          CFGDWADDR                            => CFGDWADDR,
02021          CFGERRACSN                           => CFGERRACSN,
02022          
02023          CFGERRAERHEADERLOG                   => CFGERRAERHEADERLOG,
02024          CFGERRCORN                           => CFGERRCORN,
02025          CFGERRCPLABORTN                      => CFGERRCPLABORTN,
02026          CFGERRCPLTIMEOUTN                    => CFGERRCPLTIMEOUTN,
02027          CFGERRCPLUNEXPECTN                   => CFGERRCPLUNEXPECTN,
02028          CFGERRECRCN                          => CFGERRECRCN,
02029          CFGERRLOCKEDN                        => CFGERRLOCKEDN,
02030          CFGERRPOSTEDN                        => CFGERRPOSTEDN,
02031          CFGERRTLPCPLHEADER                   => CFGERRTLPCPLHEADER,
02032          CFGERRURN                            => CFGERRURN,
02033          CFGINTERRUPTASSERTN                  => CFGINTERRUPTASSERTN,
02034          CFGINTERRUPTDI                       => CFGINTERRUPTDI,
02035          CFGINTERRUPTN                        => CFGINTERRUPTN,
02036          CFGPMDIRECTASPML1N                   => CFGPMDIRECTASPML1N,
02037          CFGPMSENDPMACKN                      => CFGPMSENDPMACKN,
02038          CFGPMSENDPMETON                      => CFGPMSENDPMETON,
02039          CFGPMSENDPMNAKN                      => CFGPMSENDPMNAKN,
02040          CFGPMTURNOFFOKN                      => CFGPMTURNOFFOKN,
02041          CFGPMWAKEN                           => CFGPMWAKEN,
02042          CFGPORTNUMBER                        => CFGPORTNUMBER,
02043          CFGRDENN                             => CFGRDENN,
02044          CFGTRNPENDINGN                       => CFGTRNPENDINGN,
02045          CFGWRENN                             => CFGWRENN,
02046          CFGWRREADONLYN                       => CFGWRREADONLYN,
02047          CFGWRRW1CASRWN                       => CFGWRRW1CASRWN,
02048          CMRSTN                               => CMRSTN,
02049          CMSTICKYRSTN                         => CMSTICKYRSTN,
02050          DBGMODE                              => DBGMODE,
02051          DBGSUBMODE                           => DBGSUBMODE,
02052          DLRSTN                               => DLRSTN,
02053          DRPCLK                               => PCIEDRPCLK,
02054          DRPDADDR                             => PCIEDRPDADDR,
02055          DRPDEN                               => PCIEDRPDEN,
02056          DRPDI                                => PCIEDRPDI,
02057          DRPDWE                               => PCIEDRPDWE,
02058          FUNCLVLRSTN                          => FUNCLVLRSTN,
02059          LL2SENDASREQL1N                      => LL2SENDASREQL1N,
02060          LL2SENDENTERL1N                      => LL2SENDENTERL1N,
02061          LL2SENDENTERL23N                     => LL2SENDENTERL23N,
02062          LL2SUSPENDNOWN                       => LL2SUSPENDNOWN,
02063          LL2TLPRCVN                           => LL2TLPRCVN,
02064          MIMRXRDATA                           => MIMRXRDATA(67 downto 0),
02065          MIMTXRDATA                           => MIMTXRDATA(68 downto 0),
02066          PIPECLK                              => PIPECLK ,
02067          PIPERX0CHANISALIGNED                 => PIPERX0CHANISALIGNED,
02068          PIPERX0CHARISK                       => PIPERX0CHARISK_v6pcie,
02069          PIPERX0DATA                          => PIPERX0DATA,
02070          PIPERX0ELECIDLE                      => PIPERX0ELECIDLE,
02071          PIPERX0PHYSTATUS                     => PIPERX0PHYSTATUS,
02072          PIPERX0STATUS                        => PIPERX0STATUS,
02073          PIPERX0VALID                         => PIPERX0VALID,
02074          PIPERX1CHANISALIGNED                 => PIPERX1CHANISALIGNED,
02075          PIPERX1CHARISK                       => PIPERX1CHARISK_v6pcie,
02076          PIPERX1DATA                          => PIPERX1DATA,
02077          PIPERX1ELECIDLE                      => PIPERX1ELECIDLE,
02078          PIPERX1PHYSTATUS                     => PIPERX1PHYSTATUS,
02079          PIPERX1STATUS                        => PIPERX1STATUS,
02080          PIPERX1VALID                         => PIPERX1VALID,
02081          PIPERX2CHANISALIGNED                 => PIPERX2CHANISALIGNED,
02082          PIPERX2CHARISK                       => PIPERX2CHARISK_v6pcie,
02083          PIPERX2DATA                          => PIPERX2DATA,
02084          PIPERX2ELECIDLE                      => PIPERX2ELECIDLE,
02085          PIPERX2PHYSTATUS                     => PIPERX2PHYSTATUS,
02086          PIPERX2STATUS                        => PIPERX2STATUS,
02087          PIPERX2VALID                         => PIPERX2VALID,
02088          PIPERX3CHANISALIGNED                 => PIPERX3CHANISALIGNED,
02089          PIPERX3CHARISK                       => PIPERX3CHARISK_v6pcie,
02090          PIPERX3DATA                          => PIPERX3DATA,
02091          PIPERX3ELECIDLE                      => PIPERX3ELECIDLE,
02092          PIPERX3PHYSTATUS                     => PIPERX3PHYSTATUS,
02093          PIPERX3STATUS                        => PIPERX3STATUS,
02094          PIPERX3VALID                         => PIPERX3VALID,
02095          PIPERX4CHANISALIGNED                 => PIPERX4CHANISALIGNED,
02096          PIPERX4CHARISK                       => PIPERX4CHARISK_v6pcie,
02097          PIPERX4DATA                          => PIPERX4DATA,
02098          PIPERX4ELECIDLE                      => PIPERX4ELECIDLE,
02099          PIPERX4PHYSTATUS                     => PIPERX4PHYSTATUS,
02100          PIPERX4STATUS                        => PIPERX4STATUS,
02101          PIPERX4VALID                         => PIPERX4VALID,
02102          PIPERX5CHANISALIGNED                 => PIPERX5CHANISALIGNED,
02103          PIPERX5CHARISK                       => PIPERX5CHARISK_v6pcie,
02104          PIPERX5DATA                          => PIPERX5DATA,
02105          PIPERX5ELECIDLE                      => PIPERX5ELECIDLE,
02106          PIPERX5PHYSTATUS                     => PIPERX5PHYSTATUS,
02107          PIPERX5STATUS                        => PIPERX5STATUS,
02108          PIPERX5VALID                         => PIPERX5VALID,
02109          PIPERX6CHANISALIGNED                 => PIPERX6CHANISALIGNED,
02110          PIPERX6CHARISK                       => PIPERX6CHARISK_v6pcie,
02111          PIPERX6DATA                          => PIPERX6DATA,
02112          PIPERX6ELECIDLE                      => PIPERX6ELECIDLE,
02113          PIPERX6PHYSTATUS                     => PIPERX6PHYSTATUS,
02114          PIPERX6STATUS                        => PIPERX6STATUS,
02115          PIPERX6VALID                         => PIPERX6VALID,
02116          PIPERX7CHANISALIGNED                 => PIPERX7CHANISALIGNED,
02117          PIPERX7CHARISK                       => PIPERX7CHARISK_v6pcie,
02118          PIPERX7DATA                          => PIPERX7DATA,
02119          PIPERX7ELECIDLE                      => PIPERX7ELECIDLE,
02120          PIPERX7PHYSTATUS                     => PIPERX7PHYSTATUS,
02121          PIPERX7STATUS                        => PIPERX7STATUS,
02122          PIPERX7VALID                         => PIPERX7VALID,
02123          PLDBGMODE                            => PLDBGMODE,
02124          PLDIRECTEDLINKAUTON                  => PLDIRECTEDLINKAUTON,
02125          PLDIRECTEDLINKCHANGE                 => PLDIRECTEDLINKCHANGE,
02126          PLDIRECTEDLINKSPEED                  => PLDIRECTEDLINKSPEED,
02127          PLDIRECTEDLINKWIDTH                  => PLDIRECTEDLINKWIDTH,
02128          PLDOWNSTREAMDEEMPHSOURCE             => PLDOWNSTREAMDEEMPHSOURCE,
02129          PLRSTN                               => PLRSTN,
02130          PLTRANSMITHOTRST                     => PLTRANSMITHOTRST,
02131          PLUPSTREAMPREFERDEEMPH               => PLUPSTREAMPREFERDEEMPH,
02132          PL2DIRECTEDLSTATE                    => PL2DIRECTEDLSTATE,
02133          SYSRSTN                              => SYSRSTN,
02134          TLRSTN                               => TLRSTN,
02135          TL2ASPMSUSPENDCREDITCHECKN           => '1',
02136          TL2PPMSUSPENDREQN                    => '1',
02137          
02138          TRNFCSEL                             => TRNFCSEL,
02139          TRNRDSTRDYN                          => TRNRDSTRDYN,
02140          TRNRNPOKN                            => TRNRNPOKN,
02141          TRNTCFGGNTN                          => TRNTCFGGNTN,
02142          TRNTD                                => TRNTD,
02143          TRNTDLLPDATA                         => TRNTDLLPDATA,
02144          
02145          TRNTDLLPSRCRDYN                      => TRNTDLLPSRCRDYN,
02146          TRNTECRCGENN                         => TRNTECRCGENN,
02147          TRNTEOFN                             => TRNTEOFN,
02148          TRNTERRFWDN                          => TRNTERRFWDN,
02149          TRNTREMN                             => TRNTREMN,
02150          TRNTSOFN                             => TRNTSOFN,
02151          TRNTSRCDSCN                          => TRNTSRCDSCN,
02152          TRNTSRCRDYN                          => TRNTSRCRDYN,
02153          TRNTSTRN                             => TRNTSTRN,
02154          USERCLK                              => USERCLK
02155       );
02156    
02157    ---------------------------------------------------------
02158    -- Virtex6 PIPE Module
02159    ---------------------------------------------------------
02160    
02161    
02162    
02163    pcie_pipe_i : pcie_pipe_v6
02164       generic map (
02165          NO_OF_LANES              => LINK_CAP_MAX_LINK_WIDTH_int,
02166          LINK_CAP_MAX_LINK_SPEED  => LINK_CAP_MAX_LINK_SPEED,
02167          PIPE_PIPELINE_STAGES     => PIPE_PIPELINE_STAGES
02168       )
02169       port map (
02170          
02171          -- Pipe Per-Link Signals 
02172          pipe_tx_rcvr_det_i        => PIPETXRCVRDET,
02173          pipe_tx_reset_i           => PIPETXRESET,
02174          pipe_tx_rate_i            => PIPETXRATE,
02175          pipe_tx_deemph_i          => PIPETXDEEMPH,
02176          pipe_tx_margin_i           => PIPETXMARGIN,
02177          pipe_tx_swing_i            => '0' ,
02178          
02179          pipe_tx_rcvr_det_o        => PIPETXRCVRDETGT,
02180          pipe_tx_reset_o            => open,
02181          pipe_tx_rate_o             => PIPETXRATEGT,
02182          pipe_tx_deemph_o           => PIPETXDEEMPHGT,
02183          pipe_tx_margin_o           => PIPETXMARGINGT,
02184          pipe_tx_swing_o            => open,
02185          
02186          -- Pipe Per-Lane Signals - Lane 0
02187          pipe_rx0_char_is_k_o       => PIPERX0CHARISK,
02188          pipe_rx0_data_o            => PIPERX0DATA,
02189          pipe_rx0_valid_o          => PIPERX0VALID,
02190          pipe_rx0_chanisaligned_o   => PIPERX0CHANISALIGNED,
02191          pipe_rx0_status_o          => PIPERX0STATUS,
02192          pipe_rx0_phy_status_o     => PIPERX0PHYSTATUS,
02193          pipe_rx0_elec_idle_i       => PIPERX0ELECIDLEGT,
02194          pipe_rx0_polarity_i        => PIPERX0POLARITY,
02195          pipe_tx0_compliance_i     => PIPETX0COMPLIANCE,
02196          pipe_tx0_char_is_k_i      => PIPETX0CHARISK,
02197          pipe_tx0_data_i           => PIPETX0DATA,
02198          pipe_tx0_elec_idle_i      => PIPETX0ELECIDLE,
02199          pipe_tx0_powerdown_i       => PIPETX0POWERDOWN,
02200          
02201          pipe_rx0_char_is_k_i      => PIPERX0CHARISKGT,
02202          pipe_rx0_data_i           => PIPERX0DATAGT,
02203          pipe_rx0_valid_i          => PIPERX0VALIDGT,
02204          pipe_rx0_chanisaligned_i   => PIPERX0CHANISALIGNEDGT,
02205          pipe_rx0_status_i         => PIPERX0STATUSGT,
02206          pipe_rx0_phy_status_i     => PIPERX0PHYSTATUSGT,
02207          pipe_rx0_elec_idle_o      => PIPERX0ELECIDLE,
02208          pipe_rx0_polarity_o       => PIPERX0POLARITYGT,
02209          pipe_tx0_compliance_o     => PIPETX0COMPLIANCEGT,
02210          pipe_tx0_char_is_k_o      => PIPETX0CHARISKGT,
02211          pipe_tx0_data_o           => PIPETX0DATAGT,
02212          pipe_tx0_elec_idle_o      => PIPETX0ELECIDLEGT,
02213          pipe_tx0_powerdown_o      => PIPETX0POWERDOWNGT,
02214          
02215          -- Pipe Per-Lane Signals - Lane 1
02216          pipe_rx1_char_is_k_o      => PIPERX1CHARISK,
02217          pipe_rx1_data_o           => PIPERX1DATA,
02218          pipe_rx1_valid_o          => PIPERX1VALID,
02219          pipe_rx1_chanisaligned_o   => PIPERX1CHANISALIGNED,
02220          pipe_rx1_status_o         => PIPERX1STATUS,
02221          pipe_rx1_phy_status_o     => PIPERX1PHYSTATUS,
02222          pipe_rx1_elec_idle_i      => PIPERX1ELECIDLEGT,
02223          pipe_rx1_polarity_i       => PIPERX1POLARITY,
02224          pipe_tx1_compliance_i     => PIPETX1COMPLIANCE,
02225          pipe_tx1_char_is_k_i      => PIPETX1CHARISK,
02226          pipe_tx1_data_i           => PIPETX1DATA,
02227          pipe_tx1_elec_idle_i      => PIPETX1ELECIDLE,
02228          pipe_tx1_powerdown_i      => PIPETX1POWERDOWN,
02229          
02230          pipe_rx1_char_is_k_i      => PIPERX1CHARISKGT,
02231          pipe_rx1_data_i           => PIPERX1DATAGT,
02232          pipe_rx1_valid_i          => PIPERX1VALIDGT,
02233          pipe_rx1_chanisaligned_i  => PIPERX1CHANISALIGNEDGT,
02234          pipe_rx1_status_i         => PIPERX1STATUSGT,
02235          pipe_rx1_phy_status_i     => PIPERX1PHYSTATUSGT,
02236          pipe_rx1_elec_idle_o      => PIPERX1ELECIDLE,
02237          pipe_rx1_polarity_o       => PIPERX1POLARITYGT,
02238          pipe_tx1_compliance_o     => PIPETX1COMPLIANCEGT,
02239          pipe_tx1_char_is_k_o      => PIPETX1CHARISKGT,
02240          pipe_tx1_data_o           => PIPETX1DATAGT,
02241          pipe_tx1_elec_idle_o      => PIPETX1ELECIDLEGT,
02242          pipe_tx1_powerdown_o      => PIPETX1POWERDOWNGT,
02243          
02244          -- Pipe Per-Lane Signals - Lane 2
02245          pipe_rx2_char_is_k_o      => PIPERX2CHARISK,
02246          pipe_rx2_data_o           => PIPERX2DATA,
02247          pipe_rx2_valid_o          => PIPERX2VALID,
02248          pipe_rx2_chanisaligned_o   => PIPERX2CHANISALIGNED,
02249          pipe_rx2_status_o         => PIPERX2STATUS,
02250          pipe_rx2_phy_status_o     => PIPERX2PHYSTATUS,
02251          pipe_rx2_elec_idle_i      => PIPERX2ELECIDLEGT,
02252          pipe_rx2_polarity_i       => PIPERX2POLARITY,
02253          pipe_tx2_compliance_i     => PIPETX2COMPLIANCE,
02254          pipe_tx2_char_is_k_i      => PIPETX2CHARISK,
02255          pipe_tx2_data_i           => PIPETX2DATA,
02256          pipe_tx2_elec_idle_i      => PIPETX2ELECIDLE,
02257          pipe_tx2_powerdown_i      => PIPETX2POWERDOWN,
02258          
02259          pipe_rx2_char_is_k_i      => PIPERX2CHARISKGT,
02260          pipe_rx2_data_i           => PIPERX2DATAGT,
02261          pipe_rx2_valid_i          => PIPERX2VALIDGT,
02262          pipe_rx2_chanisaligned_i  => PIPERX2CHANISALIGNEDGT,
02263          pipe_rx2_status_i         => PIPERX2STATUSGT,
02264          pipe_rx2_phy_status_i     => PIPERX2PHYSTATUSGT,
02265          pipe_rx2_elec_idle_o      => PIPERX2ELECIDLE,
02266          pipe_rx2_polarity_o       => PIPERX2POLARITYGT,
02267          pipe_tx2_compliance_o     => PIPETX2COMPLIANCEGT,
02268          pipe_tx2_char_is_k_o      => PIPETX2CHARISKGT,
02269          pipe_tx2_data_o           => PIPETX2DATAGT,
02270          pipe_tx2_elec_idle_o      => PIPETX2ELECIDLEGT,
02271          pipe_tx2_powerdown_o      => PIPETX2POWERDOWNGT,
02272          
02273          -- Pipe Per-Lane Signals - Lane 3
02274          pipe_rx3_char_is_k_o      => PIPERX3CHARISK,
02275          pipe_rx3_data_o           => PIPERX3DATA,
02276          pipe_rx3_valid_o          => PIPERX3VALID,
02277          pipe_rx3_chanisaligned_o   => PIPERX3CHANISALIGNED,
02278          pipe_rx3_status_o         => PIPERX3STATUS,
02279          pipe_rx3_phy_status_o     => PIPERX3PHYSTATUS,
02280          pipe_rx3_elec_idle_i      => PIPERX3ELECIDLEGT,
02281          pipe_rx3_polarity_i       => PIPERX3POLARITY,
02282          pipe_tx3_compliance_i     => PIPETX3COMPLIANCE,
02283          pipe_tx3_char_is_k_i      => PIPETX3CHARISK,
02284          pipe_tx3_data_i           => PIPETX3DATA,
02285          pipe_tx3_elec_idle_i      => PIPETX3ELECIDLE,
02286          pipe_tx3_powerdown_i      => PIPETX3POWERDOWN,
02287          
02288          pipe_rx3_char_is_k_i      => PIPERX3CHARISKGT,
02289          pipe_rx3_data_i           => PIPERX3DATAGT,
02290          pipe_rx3_valid_i          => PIPERX3VALIDGT,
02291          pipe_rx3_chanisaligned_i  => PIPERX3CHANISALIGNEDGT,
02292          pipe_rx3_status_i         => PIPERX3STATUSGT,
02293          pipe_rx3_phy_status_i     => PIPERX3PHYSTATUSGT,
02294          pipe_rx3_elec_idle_o      => PIPERX3ELECIDLE,
02295          pipe_rx3_polarity_o       => PIPERX3POLARITYGT,
02296          pipe_tx3_compliance_o     => PIPETX3COMPLIANCEGT,
02297          pipe_tx3_char_is_k_o      => PIPETX3CHARISKGT,
02298          pipe_tx3_data_o           => PIPETX3DATAGT,
02299          pipe_tx3_elec_idle_o      => PIPETX3ELECIDLEGT,
02300          pipe_tx3_powerdown_o      => PIPETX3POWERDOWNGT,
02301          
02302          -- Pipe Per-Lane Signals - Lane 4
02303          pipe_rx4_char_is_k_o      => PIPERX4CHARISK,
02304          pipe_rx4_data_o           => PIPERX4DATA,
02305          pipe_rx4_valid_o          => PIPERX4VALID,
02306          pipe_rx4_chanisaligned_o   => PIPERX4CHANISALIGNED,
02307          pipe_rx4_status_o         => PIPERX4STATUS,
02308          pipe_rx4_phy_status_o     => PIPERX4PHYSTATUS,
02309          pipe_rx4_elec_idle_i      => PIPERX4ELECIDLEGT,
02310          pipe_rx4_polarity_i       => PIPERX4POLARITY,
02311          pipe_tx4_compliance_i     => PIPETX4COMPLIANCE,
02312          pipe_tx4_char_is_k_i      => PIPETX4CHARISK,
02313          pipe_tx4_data_i           => PIPETX4DATA,
02314          pipe_tx4_elec_idle_i      => PIPETX4ELECIDLE,
02315          pipe_tx4_powerdown_i      => PIPETX4POWERDOWN,
02316          
02317          pipe_rx4_char_is_k_i      => PIPERX4CHARISKGT,
02318          pipe_rx4_data_i           => PIPERX4DATAGT,
02319          pipe_rx4_valid_i          => PIPERX4VALIDGT,
02320          pipe_rx4_chanisaligned_i  => PIPERX4CHANISALIGNEDGT,
02321          pipe_rx4_status_i         => PIPERX4STATUSGT,
02322          pipe_rx4_phy_status_i     => PIPERX4PHYSTATUSGT,
02323          pipe_rx4_elec_idle_o      => PIPERX4ELECIDLE,
02324          pipe_rx4_polarity_o       => PIPERX4POLARITYGT,
02325          pipe_tx4_compliance_o     => PIPETX4COMPLIANCEGT,
02326          pipe_tx4_char_is_k_o      => PIPETX4CHARISKGT,
02327          pipe_tx4_data_o           => PIPETX4DATAGT,
02328          pipe_tx4_elec_idle_o      => PIPETX4ELECIDLEGT,
02329          pipe_tx4_powerdown_o      => PIPETX4POWERDOWNGT,
02330          
02331          -- Pipe Per-Lane Signals - Lane 5
02332          pipe_rx5_char_is_k_o      => PIPERX5CHARISK,
02333          pipe_rx5_data_o           => PIPERX5DATA,
02334          pipe_rx5_valid_o          => PIPERX5VALID,
02335          pipe_rx5_chanisaligned_o   => PIPERX5CHANISALIGNED,
02336          pipe_rx5_status_o         => PIPERX5STATUS,
02337          pipe_rx5_phy_status_o     => PIPERX5PHYSTATUS,
02338          pipe_rx5_elec_idle_i      => PIPERX5ELECIDLEGT,
02339          pipe_rx5_polarity_i       => PIPERX5POLARITY,
02340          pipe_tx5_compliance_i     => PIPETX5COMPLIANCE,
02341          pipe_tx5_char_is_k_i      => PIPETX5CHARISK,
02342          pipe_tx5_data_i           => PIPETX5DATA,
02343          pipe_tx5_elec_idle_i      => PIPETX5ELECIDLE,
02344          pipe_tx5_powerdown_i      => PIPETX5POWERDOWN,
02345          
02346          pipe_rx5_char_is_k_i      => PIPERX5CHARISKGT,
02347          pipe_rx5_data_i           => PIPERX5DATAGT,
02348          pipe_rx5_valid_i          => PIPERX5VALIDGT,
02349          pipe_rx5_chanisaligned_i  => PIPERX5CHANISALIGNEDGT,
02350          pipe_rx5_status_i         => PIPERX5STATUSGT,
02351          pipe_rx5_phy_status_i     => PIPERX5PHYSTATUSGT,
02352          pipe_rx5_elec_idle_o      => PIPERX5ELECIDLE,
02353          pipe_rx5_polarity_o       => PIPERX5POLARITYGT,
02354          pipe_tx5_compliance_o     => PIPETX5COMPLIANCEGT,
02355          pipe_tx5_char_is_k_o      => PIPETX5CHARISKGT,
02356          pipe_tx5_data_o           => PIPETX5DATAGT,
02357          pipe_tx5_elec_idle_o      => PIPETX5ELECIDLEGT,
02358          pipe_tx5_powerdown_o      => PIPETX5POWERDOWNGT,
02359          
02360          -- Pipe Per-Lane Signals - Lane 6
02361          pipe_rx6_char_is_k_o      => PIPERX6CHARISK,
02362          pipe_rx6_data_o           => PIPERX6DATA,
02363          pipe_rx6_valid_o          => PIPERX6VALID,
02364          pipe_rx6_chanisaligned_o   => PIPERX6CHANISALIGNED,
02365          pipe_rx6_status_o         => PIPERX6STATUS,
02366          pipe_rx6_phy_status_o     => PIPERX6PHYSTATUS,
02367          pipe_rx6_elec_idle_i      => PIPERX6ELECIDLEGT,
02368          pipe_rx6_polarity_i       => PIPERX6POLARITY,
02369          pipe_tx6_compliance_i     => PIPETX6COMPLIANCE,
02370          pipe_tx6_char_is_k_i      => PIPETX6CHARISK,
02371          pipe_tx6_data_i           => PIPETX6DATA,
02372          pipe_tx6_elec_idle_i      => PIPETX6ELECIDLE,
02373          pipe_tx6_powerdown_i      => PIPETX6POWERDOWN,
02374          
02375          pipe_rx6_char_is_k_i      => PIPERX6CHARISKGT,
02376          pipe_rx6_data_i           => PIPERX6DATAGT,
02377          pipe_rx6_valid_i          => PIPERX6VALIDGT,
02378          pipe_rx6_chanisaligned_i  => PIPERX6CHANISALIGNEDGT,
02379          pipe_rx6_status_i         => PIPERX6STATUSGT,
02380          pipe_rx6_phy_status_i     => PIPERX6PHYSTATUSGT,
02381          pipe_rx6_elec_idle_o      => PIPERX6ELECIDLE,
02382          pipe_rx6_polarity_o       => PIPERX6POLARITYGT,
02383          pipe_tx6_compliance_o     => PIPETX6COMPLIANCEGT,
02384          pipe_tx6_char_is_k_o      => PIPETX6CHARISKGT,
02385          pipe_tx6_data_o           => PIPETX6DATAGT,
02386          pipe_tx6_elec_idle_o      => PIPETX6ELECIDLEGT,
02387          pipe_tx6_powerdown_o      => PIPETX6POWERDOWNGT,
02388          
02389          -- Pipe Per-Lane Signals - Lane 7
02390          pipe_rx7_char_is_k_o      => PIPERX7CHARISK,
02391          pipe_rx7_data_o           => PIPERX7DATA,
02392          pipe_rx7_valid_o          => PIPERX7VALID,
02393          pipe_rx7_chanisaligned_o   => PIPERX7CHANISALIGNED,
02394          pipe_rx7_status_o         => PIPERX7STATUS,
02395          pipe_rx7_phy_status_o     => PIPERX7PHYSTATUS,
02396          pipe_rx7_elec_idle_i      => PIPERX7ELECIDLEGT,
02397          pipe_rx7_polarity_i       => PIPERX7POLARITY,
02398          pipe_tx7_compliance_i     => PIPETX7COMPLIANCE,
02399          pipe_tx7_char_is_k_i      => PIPETX7CHARISK,
02400          pipe_tx7_data_i           => PIPETX7DATA,
02401          pipe_tx7_elec_idle_i      => PIPETX7ELECIDLE,
02402          pipe_tx7_powerdown_i      => PIPETX7POWERDOWN,
02403          
02404          pipe_rx7_char_is_k_i      => PIPERX7CHARISKGT,
02405          pipe_rx7_data_i           => PIPERX7DATAGT,
02406          pipe_rx7_valid_i          => PIPERX7VALIDGT,
02407          pipe_rx7_chanisaligned_i  => PIPERX7CHANISALIGNEDGT,
02408          pipe_rx7_status_i         => PIPERX7STATUSGT,
02409          pipe_rx7_phy_status_i     => PIPERX7PHYSTATUSGT,
02410          pipe_rx7_elec_idle_o      => PIPERX7ELECIDLE,
02411          pipe_rx7_polarity_o       => PIPERX7POLARITYGT,
02412          pipe_tx7_compliance_o     => PIPETX7COMPLIANCEGT,
02413          pipe_tx7_char_is_k_o      => PIPETX7CHARISKGT,
02414          pipe_tx7_data_o           => PIPETX7DATAGT,
02415          pipe_tx7_elec_idle_o      => PIPETX7ELECIDLEGT,
02416          pipe_tx7_powerdown_o      => PIPETX7POWERDOWNGT,
02417          
02418          -- Non PIPE signals
02419          pl_ltssm_state            => PLLTSSMSTATE_v6pcie109,
02420          pipe_clk                  => PIPECLK,
02421          rst_n                     => PHYRDYN_v6pcie102
02422       );
02423    
02424    ---------------------------------------------------------
02425    -- Virtex6 GTX Module
02426    ---------------------------------------------------------
02427    
02428    
02429    
02430    pcie_gt_i : pcie_gtx_v6
02431       generic map (
02432          NO_OF_LANES              => LINK_CAP_MAX_LINK_WIDTH_int,
02433          LINK_CAP_MAX_LINK_SPEED  => LINK_CAP_MAX_LINK_SPEED,
02434          REF_CLK_FREQ             => REF_CLK_FREQ,
02435          PL_FAST_TRAIN             => PL_FAST_TRAIN
02436       )
02437       port map (
02438          
02439          -- Pipe Common Signals 
02440          pipe_tx_rcvr_det        => PIPETXRCVRDETGT,
02441          pipe_tx_reset           => '0' ,
02442          pipe_tx_rate            => PIPETXRATEGT,
02443          pipe_tx_deemph           => PIPETXDEEMPHGT,
02444          pipe_tx_margin          => PIPETXMARGINGT,
02445          pipe_tx_swing           => '0',
02446          
02447          -- Pipe Per-Lane Signals - Lane 0
02448          pipe_rx0_char_is_k      => PIPERX0CHARISKGT,
02449          pipe_rx0_data           => PIPERX0DATAGT,
02450          pipe_rx0_valid          => PIPERX0VALIDGT,
02451          pipe_rx0_chanisaligned  => PIPERX0CHANISALIGNEDGT,
02452          pipe_rx0_status         => PIPERX0STATUSGT,
02453          pipe_rx0_phy_status     => PIPERX0PHYSTATUSGT,
02454          pipe_rx0_elec_idle      => PIPERX0ELECIDLEGT,
02455          pipe_rx0_polarity       => PIPERX0POLARITYGT,
02456          pipe_tx0_compliance     => PIPETX0COMPLIANCEGT,
02457          pipe_tx0_char_is_k      => PIPETX0CHARISKGT,
02458          pipe_tx0_data           => PIPETX0DATAGT,
02459          pipe_tx0_elec_idle      => PIPETX0ELECIDLEGT,
02460          pipe_tx0_powerdown      => PIPETX0POWERDOWNGT,
02461          
02462          -- Pipe Per-Lane Signals - Lane 1
02463          pipe_rx1_char_is_k      => PIPERX1CHARISKGT,
02464          pipe_rx1_data           => PIPERX1DATAGT,
02465          pipe_rx1_valid          => PIPERX1VALIDGT,
02466          pipe_rx1_chanisaligned  => PIPERX1CHANISALIGNEDGT,
02467          pipe_rx1_status         => PIPERX1STATUSGT,
02468          pipe_rx1_phy_status     => PIPERX1PHYSTATUSGT,
02469          pipe_rx1_elec_idle      => PIPERX1ELECIDLEGT,
02470          pipe_rx1_polarity       => PIPERX1POLARITYGT,
02471          pipe_tx1_compliance     => PIPETX1COMPLIANCEGT,
02472          pipe_tx1_char_is_k      => PIPETX1CHARISKGT,
02473          pipe_tx1_data           => PIPETX1DATAGT,
02474          pipe_tx1_elec_idle      => PIPETX1ELECIDLEGT,
02475          pipe_tx1_powerdown      => PIPETX1POWERDOWNGT,
02476          
02477          -- Pipe Per-Lane Signals - Lane 2
02478          pipe_rx2_char_is_k      => PIPERX2CHARISKGT,
02479          pipe_rx2_data           => PIPERX2DATAGT,
02480          pipe_rx2_valid          => PIPERX2VALIDGT,
02481          pipe_rx2_chanisaligned  => PIPERX2CHANISALIGNEDGT,
02482          pipe_rx2_status         => PIPERX2STATUSGT,
02483          pipe_rx2_phy_status     => PIPERX2PHYSTATUSGT,
02484          pipe_rx2_elec_idle      => PIPERX2ELECIDLEGT,
02485          pipe_rx2_polarity       => PIPERX2POLARITYGT,
02486          pipe_tx2_compliance     => PIPETX2COMPLIANCEGT,
02487          pipe_tx2_char_is_k      => PIPETX2CHARISKGT,
02488          pipe_tx2_data           => PIPETX2DATAGT,
02489          pipe_tx2_elec_idle      => PIPETX2ELECIDLEGT,
02490          pipe_tx2_powerdown      => PIPETX2POWERDOWNGT,
02491          
02492          -- Pipe Per-Lane Signals - Lane 3
02493          pipe_rx3_char_is_k      => PIPERX3CHARISKGT,
02494          pipe_rx3_data           => PIPERX3DATAGT,
02495          pipe_rx3_valid          => PIPERX3VALIDGT,
02496          pipe_rx3_chanisaligned  => PIPERX3CHANISALIGNEDGT,
02497          pipe_rx3_status         => PIPERX3STATUSGT,
02498          pipe_rx3_phy_status     => PIPERX3PHYSTATUSGT,
02499          pipe_rx3_elec_idle      => PIPERX3ELECIDLEGT,
02500          pipe_rx3_polarity       => PIPERX3POLARITYGT,
02501          pipe_tx3_compliance     => PIPETX3COMPLIANCEGT,
02502          pipe_tx3_char_is_k      => PIPETX3CHARISKGT,
02503          pipe_tx3_data           => PIPETX3DATAGT,
02504          pipe_tx3_elec_idle      => PIPETX3ELECIDLEGT,
02505          pipe_tx3_powerdown      => PIPETX3POWERDOWNGT,
02506          
02507          -- Pipe Per-Lane Signals - Lane 4
02508          pipe_rx4_char_is_k      => PIPERX4CHARISKGT,
02509          pipe_rx4_data           => PIPERX4DATAGT,
02510          pipe_rx4_valid          => PIPERX4VALIDGT,
02511          pipe_rx4_chanisaligned  => PIPERX4CHANISALIGNEDGT,
02512          pipe_rx4_status         => PIPERX4STATUSGT,
02513          pipe_rx4_phy_status     => PIPERX4PHYSTATUSGT,
02514          pipe_rx4_elec_idle      => PIPERX4ELECIDLEGT,
02515          pipe_rx4_polarity       => PIPERX4POLARITYGT,
02516          pipe_tx4_compliance     => PIPETX4COMPLIANCEGT,
02517          pipe_tx4_char_is_k      => PIPETX4CHARISKGT,
02518          pipe_tx4_data           => PIPETX4DATAGT,
02519          pipe_tx4_elec_idle      => PIPETX4ELECIDLEGT,
02520          pipe_tx4_powerdown      => PIPETX4POWERDOWNGT,
02521          
02522          -- Pipe Per-Lane Signals - Lane 5
02523          pipe_rx5_char_is_k      => PIPERX5CHARISKGT,
02524          pipe_rx5_data           => PIPERX5DATAGT,
02525          pipe_rx5_valid          => PIPERX5VALIDGT,
02526          pipe_rx5_chanisaligned  => PIPERX5CHANISALIGNEDGT,
02527          pipe_rx5_status         => PIPERX5STATUSGT,
02528          pipe_rx5_phy_status     => PIPERX5PHYSTATUSGT,
02529          pipe_rx5_elec_idle      => PIPERX5ELECIDLEGT,
02530          pipe_rx5_polarity       => PIPERX5POLARITYGT,
02531          pipe_tx5_compliance     => PIPETX5COMPLIANCEGT,
02532          pipe_tx5_char_is_k      => PIPETX5CHARISKGT,
02533          pipe_tx5_data           => PIPETX5DATAGT,
02534          pipe_tx5_elec_idle      => PIPETX5ELECIDLEGT,
02535          pipe_tx5_powerdown      => PIPETX5POWERDOWNGT,
02536          
02537          -- Pipe Per-Lane Signals - Lane 6
02538          pipe_rx6_char_is_k      => PIPERX6CHARISKGT,
02539          pipe_rx6_data           => PIPERX6DATAGT,
02540          pipe_rx6_valid          => PIPERX6VALIDGT,
02541          pipe_rx6_chanisaligned  => PIPERX6CHANISALIGNEDGT,
02542          pipe_rx6_status         => PIPERX6STATUSGT,
02543          pipe_rx6_phy_status     => PIPERX6PHYSTATUSGT,
02544          pipe_rx6_elec_idle      => PIPERX6ELECIDLEGT,
02545          pipe_rx6_polarity       => PIPERX6POLARITYGT,
02546          pipe_tx6_compliance     => PIPETX6COMPLIANCEGT,
02547          pipe_tx6_char_is_k      => PIPETX6CHARISKGT,
02548          pipe_tx6_data           => PIPETX6DATAGT,
02549          pipe_tx6_elec_idle      => PIPETX6ELECIDLEGT,
02550          pipe_tx6_powerdown      => PIPETX6POWERDOWNGT,
02551          
02552          -- Pipe Per-Lane Signals - Lane 7
02553          pipe_rx7_char_is_k      => PIPERX7CHARISKGT,
02554          pipe_rx7_data           => PIPERX7DATAGT,
02555          pipe_rx7_valid          => PIPERX7VALIDGT,
02556          pipe_rx7_chanisaligned  => PIPERX7CHANISALIGNEDGT,
02557          pipe_rx7_status         => PIPERX7STATUSGT,
02558          pipe_rx7_phy_status     => PIPERX7PHYSTATUSGT,
02559          pipe_rx7_elec_idle      => PIPERX7ELECIDLEGT,
02560          pipe_rx7_polarity       => PIPERX7POLARITYGT,
02561          pipe_tx7_compliance     => PIPETX7COMPLIANCEGT,
02562          pipe_tx7_char_is_k      => PIPETX7CHARISKGT,
02563          pipe_tx7_data           => PIPETX7DATAGT,
02564          pipe_tx7_elec_idle      => PIPETX7ELECIDLEGT,
02565          pipe_tx7_powerdown      => PIPETX7POWERDOWNGT,
02566          
02567          -- PCI Express Signals
02568          pci_exp_txn             => PCIEXPTXN_v6pcie100,
02569          pci_exp_txp             => PCIEXPTXP_v6pcie101,
02570          pci_exp_rxn             => PCIEXPRXN,
02571          pci_exp_rxp             => PCIEXPRXP,
02572          
02573          -- Non PIPE Signals
02574          sys_clk                 => SYSCLK,
02575          sys_rst_n               => FUNDRSTN,
02576          pipe_clk                => PIPECLK,
02577          drp_clk                 => DRPCLK,
02578          clock_locked            => CLOCKLOCKED,
02579          pl_ltssm_state           => PLLTSSMSTATE_v6pcie109,
02580          
02581          gt_pll_lock             => GTPLLLOCK_v6pcie96,
02582          phy_rdy_n                => PHYRDYN_v6pcie102,
02583          txoutclk                => TxOutClk_v6pcie138
02584       );
02585    
02586    ---------------------------------------------------------
02587    -- PCI Express BRAM Module
02588    ---------------------------------------------------------
02589    
02590    
02591    MIMTXWDATA_tmp <= "000" & MIMTXWDATA;
02592    MIMRXWDATA_tmp <= "0000" & MIMRXWDATA;
02593    
02594    pcie_bram_i : pcie_bram_top_v6
02595       generic map (
02596          DEV_CAP_MAX_PAYLOAD_SUPPORTED  => DEV_CAP_MAX_PAYLOAD_SUPPORTED,
02597          VC0_TX_LASTPACKET              => VC0_TX_LASTPACKET,
02598          TL_TX_RAM_RADDR_LATENCY        => TL_TX_RAM_RADDR_LATENCY,
02599          TL_TX_RAM_RDATA_LATENCY        => TL_TX_RAM_RDATA_LATENCY,
02600          TL_TX_RAM_WRITE_LATENCY        => TL_TX_RAM_WRITE_LATENCY,
02601          VC0_RX_LIMIT                   => VC0_RX_RAM_LIMIT,
02602          TL_RX_RAM_RADDR_LATENCY        => TL_RX_RAM_RADDR_LATENCY,
02603          TL_RX_RAM_RDATA_LATENCY        => TL_RX_RAM_RDATA_LATENCY,
02604          TL_RX_RAM_WRITE_LATENCY        => TL_RX_RAM_WRITE_LATENCY
02605       )
02606       port map (
02607          
02608          user_clk_i    => USERCLK,
02609          reset_i       => PHYRDYN_v6pcie102 ,
02610          
02611          mim_tx_waddr  => MIMTXWADDR,
02612          mim_tx_wen    => MIMTXWEN,
02613          mim_tx_ren    => MIMTXREN,
02614          mim_tx_rce    => MIMTXRCE,
02615          mim_tx_wdata  => MIMTXWDATA_tmp,
02616          mim_tx_raddr  => MIMTXRADDR,
02617          mim_tx_rdata  => MIMTXRDATA,
02618          
02619          mim_rx_waddr  => MIMRXWADDR,
02620          mim_rx_wen    => MIMRXWEN,
02621          mim_rx_ren    => MIMRXREN,
02622          mim_rx_rce    => MIMRXRCE,
02623          mim_rx_wdata  => MIMRXWDATA_tmp,
02624          mim_rx_raddr  => MIMRXRADDR,
02625          mim_rx_rdata  => MIMRXRDATA
02626       );
02627    
02628    ---------------------------------------------------------
02629    -- PCI Express Port Workarounds
02630    ---------------------------------------------------------
02631    
02632    
02633    
02634    pcie_upconfig_fix_3451_v6_i : pcie_upconfig_fix_3451_v6
02635       generic map (
02636          UPSTREAM_FACING          => UPSTREAM_FACING,
02637          PL_FAST_TRAIN            => PL_FAST_TRAIN,
02638          LINK_CAP_MAX_LINK_WIDTH  => LINK_CAP_MAX_LINK_WIDTH
02639       )
02640       port map (
02641          
02642          pipe_clk                           => PIPECLK,
02643          pl_phy_lnkup_n                     => PLPHYLNKUPN_v6pcie110,
02644          
02645          pl_ltssm_state                     => PLLTSSMSTATE_v6pcie109,
02646          pl_sel_lnk_rate                   => PLSELLNKRATE_v6pcie113,
02647          pl_directed_link_change            => PLDIRECTEDLINKCHANGE,
02648          
02649          cfg_link_status_negotiated_width   => CFGLINKSTATUSNEGOTIATEDWIDTH_v6pcie48,
02650          pipe_rx0_data                     => PIPERX0DATAGT(15 downto 0),
02651          pipe_rx0_char_isk                 => PIPERX0CHARISKGT(1 downto 0),
02652          
02653          filter_pipe                        => filter_pipe_upconfig_fix_3451
02654       );
02655    
02656 end v6_pcie;
02657 
02658 
02659